Method and apparatus implementing random access and time-based functions on a continuous stream of formatted digital data
First Claim
Patent Images
1. A process for capturing and storing a video signal, comprising the steps of:
- providing a plurality of linear caches for storing said video signal as digital blocks;
providing signal capture means for capturing said video signal and separating multiplexed components of said video signal before storing said components into separate linear caches;
providing cache playback means for selecting a portion of said linear caches for streaming access;
providing cache control means for controlling a rate of streaming access from said linear caches;
synchronizing streaming digital blocks from said linear caches for delivery to said cache playback means;
wherein said cache control means sends clock events to said cache playback means to control a rate and direction of streaming access; and
wherein said synchronization step synchronizes the streaming digital blocks from said linear caches such that the streaming digital blocks are correctly positioned relative to each other.
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Abstract
A continuous stream of formatted digital data, such as a video segment, audio segment, or information stream, appears to be a fixed length segment under certain circumstances, defining a virtual segment within the continuous stream which moves forward in time in synchrony with the continuous stream. The virtual segment thus defined can be explored in a non-linear fashion at arbitrary playback rates. For instance, concepts such as rewind, pause, frame advance, and fast forward become meaningful even though the continuous stream never ceases.
231 Citations
156 Claims
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1. A process for capturing and storing a video signal, comprising the steps of:
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providing a plurality of linear caches for storing said video signal as digital blocks;
providing signal capture means for capturing said video signal and separating multiplexed components of said video signal before storing said components into separate linear caches;
providing cache playback means for selecting a portion of said linear caches for streaming access;
providing cache control means for controlling a rate of streaming access from said linear caches;
synchronizing streaming digital blocks from said linear caches for delivery to said cache playback means;
wherein said cache control means sends clock events to said cache playback means to control a rate and direction of streaming access; and
wherein said synchronization step synchronizes the streaming digital blocks from said linear caches such that the streaming digital blocks are correctly positioned relative to each other. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 109)
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21. A process for capturing and storing a video signal, comprising the steps of:
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providing a plurality of linear caches for storing said video signal as digital blocks;
providing signal capture means for capturing said video signal and separating multiplexed components of said video signal before storing said components into separate linear caches;
providing cache playback means for selecting a portion of said linear caches for playback;
providing cache control means for controlling a rate of playback from said linear caches;
providing data synchronization means for synchronizing selected digital blocks from said linear caches for delivery to said cache playback means; and
wherein said data synchronization means synchronizes said selected digital blocks from said linear caches such that said selected digital blocks are correctly positioned relative to each other. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41)
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42. A process for capturing and storing a video signal, comprising the steps of:
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providing a plurality of linear caches for storing said video signal as digital blocks;
providing signal capture means for capturing said video signal and separating multiplexed components of said video signal before storing said components into separate linear caches;
providing cache playback means for selecting a portion of said linear caches for playback; and
providing cache control means for controlling a rate of playback from said linear caches. - View Dependent Claims (43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63)
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64. A process for capturing and storing a data stream, comprising the steps of:
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providing a linear cache for storing information from said data stream;
providing cache access means for selecting a portion of the linear cache for streaming access to information stored therein;
providing cache control means for controlling a rate of said streaming access to said linear cache; and
providing synchronization means for synchronizing streamed information from said linear cache for delivery to said cache access means;
wherein said cache control means controls a rate and direction of said streaming access. - View Dependent Claims (65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85)
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86. A process for capturing and storing a data stream, comprising the steps of:
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providing a linear cache for storing information from said data stream;
providing cache access means for selecting a portion of the linear cache for streaming access to information stored therein;
providing cache control means for controlling a rate of said streaming access to said linear cache; and
providing synchronization means for synchronizing streamed information from said linear cache for delivery to said cache access means;
wherein said cache control means sends clock events to said cache access means to control a rate and direction of said streaming access. - View Dependent Claims (87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106)
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107. A process for processing data streams, comprising the steps of:
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providing a plurality of linear caches for storing information from said data streams as digital blocks;
providing cache access means for selecting a portion of said linear caches for streaming access;
providing cache control means for controlling a rate of streaming access from said linear caches;
providing synchronization means for synchronizing streaming digital blocks from said linear caches for delivery to said cache playback means;
wherein said cache control means sends clock events to said cache playback means to control a rate and direction of streaming access; and
wherein said synchronization means synchronizes the streaming digital blocks from said linear caches such that the streaming digital blocks are correctly positioned relative to each other. - View Dependent Claims (108, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155)
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131. A process for processing data streams, comprising the steps of:
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providing a plurality of linear caches for storing information from said data streams as digital blocks;
providing cache access means for selecting a portion of said linear caches for streaming access; and
providing cache control means for controlling a rate of streaming access from said linear caches;
wherein said cache control means controls a rate and direction of streaming access.
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156. An apparatus for processing data streams, comprising:
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means for generating a substantially continuous sequence of digital input signal values representing an incoming audio or video program signal;
a source of control commands;
a program signal utilization device; and
a variable delay linear buffer for storing those of said digital input signal values which were received during the immediately preceding time intervals of predetermined duration, said linear buffer having an input port connected to receive said digital input signal values and an output port connected to supply a delayed replica of said input signal values to said utilization device following a variable delay interval, the duration of said interval being selectable in response to said control commands, said linear buffer comprising, in combination;
an addressable digital memory;
a programmed processor;
memory access means for continuously writing said sequence of digital input signal values into said addressable digital memory at a sequence of continually advancing writing addresses established by said processor and for concurrently reproducing and supplying to said output port an output sequence of previously written ones of signal values read from said addressable digital memory at a sequence of different reading addresses established by said processor; and
means for supplying said output sequence to said output port;
wherein said programmed processor includes means responsive to said control commands for varying the relative locations of said reading and writing addresses to selectively alter said variable delay interval.
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Specification