Method of manufacturing a semiconductor device

• US 20020038918A1
• Filed: 09/28/2001
• Published: 04/04/2002
• Est. Priority Date: 10/02/2000
• Status: Active Grant

• Current Assignee: Renesas Semiconductor Package & Test Solutions Co., Ltd. (Renesas Electronics Corporation), Visteon Global Technologies Incorporated (Visteon Corporation)
• Original Assignee: Renesas Technology Corporation (Renesas Electronics Corporation)
• Inventors: Gotou, Masakatsu, Kasai, Norihiko
• Granted Patent: US 6,835,596 B2
• Time in Patent Office: Days
• US Class Current: 264/39
• CPC Class Codes: B29C 45/14655 connected to or mounted on a carrier, e.g. lead frame
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/05571 the external layer being disposed in a recess of the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/4554 Coating
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48228 the bond pad being disposed in a recess of the surface of the item
• CPC Class Codes: H01L 2224/48471 the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/4945 Wire connectors having connecting portions of different types on the semiconductor or solid-state body, e.g. regular and reverse stitches
• CPC Class Codes: H01L 2224/73203 Bump and layer connectors
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/73265 : Layer and wire connectors
• CPC Class Codes: H01L 2224/78 : Apparatus for connecting with wire connectors
• CPC Class Codes: H01L 2224/81 : using a bump connector
• CPC Class Codes: H01L 2224/83 : using a layer connector
• CPC Class Codes: H01L 2224/85 : using a wire connector
• CPC Class Codes: H01L 2224/85013 : Plasma cleaning
• CPC Class Codes: H01L 2224/85191 : connecting first both on and outside the semiconductor or solid-state body, i.e. regular and reverse stitches
• CPC Class Codes: H01L 2224/85203 : Thermocompression bonding
• CPC Class Codes: H01L 2224/85205 : Ultrasonic bonding
• CPC Class Codes: H01L 2224/92 : Specific sequence of method steps
• CPC Class Codes: H01L 2224/92247 : the second connecting process involving a wire connector
• CPC Class Codes: H01L 2224/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2225/06558 : the devices having passive surfaces facing each other, i.e. in a back-to-back arrangement
• CPC Class Codes: H01L 2225/06568 : the devices decreasing in size, e.g. pyramidical stack
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/85 : using a wire connector wire bonding in general B23K20/004
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01018 : Argon [Ar]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation

Abstract

The improvement of the yields of semiconductor devices is intended. In a method for manufacturing a semiconductor device, it has forming a resin enclosure for block-molding a plurality of semiconductor chips by placing a plurality of semiconductor chips inside a cavity of a molding die along with a substrate and then injecting a resin from a first side to a second side of a main surface of the substrate, the plurality of semiconductor chips being mounted on the main surface of the substrate from the first side to the second side of the main surface with a predetermined space, the second side facing to the first side, the method further has applying cleaning treatment to the main surface of the substrate before forming the resin enclosure.

Claims

1. A method for manufacturing a semiconductor device comprising forming a resin enclosure for block-molding a plurality of semiconductor chips by placing a plurality of semiconductor chips inside a cavity of a molding die along with a substrate and then injecting a resin inside said cavity from a first side to a second side of a main surface of said substrate, the plurality of semiconductor chips being mounted on the main surface of said substrate from the first side to the second side of said main surface with a predetermined space, the second side facing to said first side,

wherein the method further comprises removing impurities remaining on the main surface of said substrate before forming said resin enclosure.

2. The method for manufacturing the semiconductor device according to claim 1, wherein removing impurities remaining on the main surface of said substrate is performed by plasma cleaning.

3. The method for manufacturing the semiconductor device according to claim 2, wherein said plasma cleaning removes impurities remaining on the main surface of said substrate and roughens the main surface of said substrate.

4. The method for manufacturing the semiconductor device according to claim 1 further comprising mounting said plurality of semiconductor chips on the main surface of said substrate before forming said resin enclosure,

wherein removing impurities remaining on the main surface of said substrate is performed after mounting said plurality of semiconductor chips and before forming said resin enclosure.

5. The method for manufacturing the semiconductor device according to claim 4, wherein mounting said plurality of semiconductor chips includes attaching and fixing said semiconductor chip on the main surface of said substrate and electrically connecting electrode pads formed on a main surface of said semiconductor chip to connecting parts formed on the main surface of said substrate with bonding wires.

6. The method for manufacturing the semiconductor device according to claim 5 further comprising removing impurities remaining on surfaces of the electrode pads of said semiconductor chip and surfaces of the connecting parts of said substrate by plasma cleaning after attaching and fixing said semiconductor chip and before electrically connecting with said bonding wires.

7. The method for manufacturing the semiconductor device according to claim 1, wherein said substrate is a resin substrate.

8. The method for manufacturing the semiconductor device according to claim 1, wherein said substrate has a resin film on the main surface thereof.

9. The method for manufacturing the semiconductor device according to claim 1, wherein said semiconductor chip is formed to have a rectangular plane, and

two sides of said semiconductor chip facing each other are crossed to an injecting direction of said resin.

10. The method for manufacturing the semiconductor device according to claim 1, wherein said resin is mixed with many fillers.

11. The method for manufacturing the semiconductor device according to claim 1, wherein said resin is an epoxy thermosetting resin mixed with many fillers.

12. The method for manufacturing the semiconductor device according to claim 1 further comprising separating said resin enclosure and said substrate into each of said semiconductor chips after forming said resin enclosure.

14. The method for manufacturing the semiconductor device according to claim 13, wherein said surface roughening treatment is performed by plasma cleaning.

15. The method for manufacturing the semiconductor device according to claim 14, wherein said plasma cleaning removes impurities remaining on a main surface of said substrate and roughens the main surface of said substrate.

16. The method for manufacturing the semiconductor device according to claim 13 further comprising mounting said plurality of semiconductor chips on the main surface of said substrate before forming said resin enclosure,

wherein applying said surface roughening treatment is performed after mounting said plurality of semiconductor chips and before forming said resin enclosure.

17. The method for manufacturing the semiconductor device according to claim 16, wherein mounting said plurality of semiconductor chips includes attaching and fixing said semiconductor chip on the main surface of said substrate and electrically connecting electrode pads formed on a main surface of said semiconductor chip to connecting parts formed on the main surface of said substrate with bonding wires.

18. The method for manufacturing the semiconductor device according to claim 17 further comprising applying cleaning treatment to surfaces of the electrode pads of said semiconductor chip and surfaces of the connecting parts of said substrate by plasma cleaning after attaching and fixing said semiconductor chip and before electrically connecting with said bonding wires.

19. The method for manufacturing the semiconductor device according to claim 13, wherein said substrate is a resin substrate.

20. The method for manufacturing the semiconductor device according to claim 13, wherein said substrate has a resin film on the main surface thereof.

21. The method for manufacturing the semiconductor device according to claim 13, wherein said semiconductor chip is formed to have a rectangular plane, and

two sides of said semiconductor chip facing each other are crossed in an injecting direction of said resin.

22. The method for manufacturing the semiconductor device according to claim 13, wherein said resin is mixed with many fillers.

23. The method for manufacturing the semiconductor device according to claim 13, wherein said resin is an epoxy thermosetting resin mixed with many fillers.

24. The method for manufacturing the semiconductor device according to claim 13 further comprising separating said resin enclosure and said substrate into each of said semiconductor chips after forming said resin enclosure.

26. The method for manufacturing the semiconductor device according to claim 25, wherein removing impurities remaining on the main surface of said substrate is performed by plasma cleaning.

28. The method for manufacturing the semiconductor device according to claim 27, wherein said surface roughening treatment is performed by plasma cleaning.

13. A method for manufacturing a semiconductor device comprising forming a resin enclosure for block-molding a plurality of semiconductor chips by placing a plurality of semiconductor chips inside a cavity of a molding die along with a substrate and then injecting a resin inside said cavity from a first side to a second side of a main surface of said substrate, the plurality of semiconductor chips being mounted on the main surface of said substrate from the first side to the second side of said main surface with a predetermined space, the second side facing to said first side,

wherein the method further comprises surface roughening treatment is applied to the main surface of said substrate before forming said resin enclosure.

25. A method for manufacturing a semiconductor device comprising forming a resin enclosure for block-molding a plurality of semiconductor chips by placing a plurality of first semiconductor chips and a plurality of second semiconductor chips laminated on each of said plurality of first semiconductor chips inside a cavity of a molding die along with a substrate and then injecting a resin inside said cavity from a first side to a second side of a main surface of said substrate, the plurality of first semiconductor chips being mounted on the main surface of said substrate from the first side to the second side of said main surface with a predetermined space, the second side facing to said first side,

wherein the method further comprises removing impurities remaining on the main surface of said substrate before forming said resin enclosure.

27. A method for manufacturing a semiconductor device comprising forming a resin enclosure for block-molding a plurality of semiconductor chips by placing a plurality of first semiconductor chips and a plurality of second semiconductor chips laminated on each of said plurality of first semiconductor chips inside a cavity of a molding die along with a substrate and then injecting a resin inside said cavity from a first side to a second side of a main surface of said substrate, the plurality of first semiconductor chips being mounted on the main surface of said substrate from the first side to the second side of said main surface with a predetermined space, the second side facing to said first side,

wherein the method further comprises applying surface roughening treatment to the main surface of said substrate before forming said resin enclosure.