Low voltage charge pump employing distributed charge boosting

• US 20020041503A1
• Filed: 10/25/2001
• Published: 04/11/2002
• Est. Priority Date: 09/14/2000
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Bob Roohparvar, Karl Rapp, K. Z. Mahouti
• Inventors: Roohparvar, Bob, Mahouti, K. Z., Rapp, Karl
• Granted Patent: US 6,633,494 B2
• Time in Patent Office: Days
• US Class Current: 363/60
• CPC Class Codes: H02M 3/073 Charge pumps of the Schenkel-type
• CPC Class Codes: H02M 3/076 the clock signals being boosted to a value being higher than the input voltage value

Abstract

A charge pump system, including a charge pump and associated distributed clock generation circuitry, is provided for generating high voltages from a low initial voltage in applications such as erasing and programming electrically erasable programmable read only memory (EEPROM) arrays. The charge pump system uses a power supply voltage and a clock and includes a first phase bootstrapping circuit, an inverter, and a second phase bootstrapping circuit, and a two-stage charge pump. The two phase bootstrapping circuits are both responsive to the clock and use a distributed bootstrapping scheme to provide first and second phase clock signals with fixed multiples of the power supply voltage in order to overcome increased effective transistor threshold voltages, increase efficiency, and allow for charge boosting in a limited number of stages. The inverter is connected to the second phase bootstrapping circuit, causing the second phase clock signal to be opposite in phase from the first clock signal. The two-stage charge pump is responsive to the power supply voltage and the first and second phase clocks and uses native transistors that have lower threshold voltages. A high voltage is produced from the two-stage charge pump by alternately adding charge to the power supply voltage in each cycle of the first and second phase clock signals.

Claims

1. A charge pump system for connection to a power supply voltage and a clock, comprising:

a first phase bootstrapping circuit responsive to the clock for providing a first phase clock signal with a fixed multiple of the power supply voltage;

inverting circuitry responsive to the clock to provide an inverted clock output opposite in phase to the clock;

a second phase bootstrapping circuit responsive to the inverted clock output for providing a second phase clock signal of opposite phase to the first phase clock signal and with a fixed multiple of the power supply voltage; and

charge pump circuitry responsive to the power supply voltage and the first and second phase clocks whereby the power supply voltage is increased by alternately adding charge to the power supply voltage from the power supply voltage in each cycle of the first and second phase clock signals whereby the first and second phase clock signals with fixed multiples of the power supply voltage allow for charge boosting in a limited number of stages.

2. The charge pump system as claimed in claim 1 wherein:

the first phase bootstrapping circuit includes;

a first phase bootstrapping circuit input and output, the input connected to the clock;

a first bootstrapping circuit having an input and an output, the input connected to the first phase bootstrapping circuit input;

a second bootstrapping circuit having an input and an output, the input connected to the first phase bootstrapping circuit input;

an intermediate charge pump having an input and an output, the input connected to the second bootstrapping circuit output;

an opposite phase clock generation circuit having an input and an output, the input connected to the first phase bootstrapping circuit input, and

a summing circuit having a main input, a supply voltage input, a clock input, and an output, the main input connected to the first bootstrapping circuit output, the supply voltage input connected to the intermediate charge pump output, the clock input connected to the opposite phase clock generation circuit output and the output connected to the first phase bootstrapping circuit output.

3. The charge pump system as claimed in claim 1 wherein:

the inverting circuitry includes two transistors.

4. The charge pump system as claimed in claim 1 wherein:

the second phase bootstrapping circuit includes;

a second phase bootstrapping circuit input and output, the input connected to the clock;

a first bootstrapping circuit having an input and an output, the input connected to the second phase bootstrapping circuit input;

a second bootstrapping circuit having an input and an output, the input connected to the second phase bootstrapping circuit input;

an intermediate charge pump having an input and an output, the input connected to the second bootstrapping circuit output;

an opposite phase clock generation circuit having an input and an output, the input connected to the second phase bootstrapping circuit input, and

a summing circuit having a main input, a supply voltage input, a clock input, and an output, the main input connected to the first bootstrapping circuit output, the supply voltage input connected to the intermediate charge pump output, the clock input connected to the opposite phase clock generation circuit output, and the output connected to the second phase bootstrapping circuit output.

5. The charge pump system as claimed in claim 1 wherein:

the charge pump circuitry includes;

a charge pump input for receiving an input voltage to be pumped and connected to the power supply voltage;

a first charge pump stage with an input and an output, the input connected to the power supply voltage;

a first storage device coupling the first charge pump stage with the first phase bootstrapping circuitry;

a second charge pump stage with an input and an output, the input connected to the first charge pump stage output;

a second storage device coupling the second charge pump stage with the second phase bootstrapping circuitry, and

a charge pump output for providing a pumped output voltage and connected to the second charge pump stage output.

6. The charge pump system as claimed in claim 1 wherein:

the charge pump circuitry has a plurality of charge pump stages connected in series, each of the charge pump stages having an input and an output; and

the charge pump circuitry pumps an input voltage at the input of alternate charge pump stages to a voltage in excess of the input voltage in response to the first and second phase clock signals and provides the voltage to the output.

7. The charge pump system as claimed in claim 1 wherein:

the first and second phase bootstrapping circuits provide high amplitude first and second phase clock signals.

8. A charge pump system for connection to a power supply voltage and a clock, comprising:

a first phase bootstrapping circuit responsive to the clock for providing a first phase clock signal with a fixed multiple of the power supply voltage;

an inverter responsive to the clock with an inverted clock output opposite in phase to the clock;

a second phase bootstrapping circuit responsive to the inverted clock output whereby a second phase clock signal opposite in phase to the first phase clock signal and with a fixed multiple of the power supply voltage is provided, and

a charge pump circuit responsive to the power supply voltage and the first and second phase clocks whereby the power supply voltage is increased by alternately adding charge to the power supply voltage from the power supply voltage in each cycle of the first and second phase clock signals whereby the first and second phase clock signals with fixed multiples of the power supply voltage allow for charge boosting in a limited number of stages.

9. The charge pump system as claimed in claim 8 wherein:

the first phase bootstrapping circuit includes;

a first phase bootstrapping circuit input and output, the input connected to the clock;

a first bootstrapping circuit having an input and an output, the input connected to the first phase bootstrapping circuit input and including;

an inverter;

a plurality of interconnected transistors responsive to the clock and connected to the inverter;

a plurality of charge storage circuits for storing charge and connected to the inverter and the interconnected transistors; and

an output from and connected to the interconnected transistors as a feedback loop;

a second bootstrapping circuit having an input and an output, the input connected to the first phase bootstrapping circuit input and including;

an inverter;

a plurality of interconnected transistors responsive to the clock and connected to the inverter;

a plurality of charge storage circuits for storing charge and connected to the inverter and the interconnected transistors; and

an output from and connected to the interconnected transistors as a feedback loop;

an intermediate charge pump having a single charge pump stage, an input, and an output, the input connected to the second bootstrapping circuit output and including;

a first transistor connected to the power supply voltage;

a second transistor connected to the first transistor and the intermediate charge pump output;

a charge storage circuits coupling the second transistor with the second bootstrapping circuit output;

an opposite phase clock generation circuit having an input and an output, the input connected to the first phase bootstrapping circuit input and including;

an first inverter;

a second inverter connected to the first inverter;

a plurality of interconnected transistors responsive to the first inverter and connected to the second inverter;

a charge storage device connecting the interconnected transistors and the second inverter, and

a summing circuit having a main input, a supply voltage input, a clock input, and an output, the main input connected to the first bootstrapping circuit output, the supply voltage input connected to the intermediate charge pump output, the clock input connected to the opposite phase clock generation circuit output, and the output connected to the first phase bootstrapping circuit output, and including;

a plurality of interconnected transistors, and a charge storage circuit coupling the plurality of interconnected transistors with the first bootstrapping circuit output.

10. The charge pump system as claimed in claim 8 including a portable electronic device connected to the charge pump circuit.

11. The charge pump system as claimed in claim 8 wherein:

the second phase bootstrapping circuit includes;

a second phase bootstrapping circuit input and output, the input connected to the clock;

a first bootstrapping circuit having an input and an output, the input connected to the second phase bootstrapping circuit input and including;

an inverter;

a plurality of interconnected transistors responsive to the clock and connected to the inverter;

a plurality of charge storage circuits for storing charge and connected to the inverter and the interconnected transistors; and

an output from and connected to the interconnected transistors as a feedback loop;

a second bootstrapping circuit having an input and an output, the input connected to the second phase bootstrapping circuit input and including;

an inverter;

a plurality of interconnected transistors responsive to the clock and connected to the inverter;

a plurality of charge storage circuits for storing charge and connected to the inverter and the interconnected transistors; and

an output from and connected to the interconnected transistors as a feedback loop;

an intermediate charge pump having a single charge pump stage, an input, and an output, the input connected to the second bootstrapping circuit output and including;

a first transistor connected to the power supply voltage;

a second transistor connected to the first transistor and the intermediate charge pump output;

a charge storage circuit coupling the second transistor with the second bootstrapping circuit output;

an opposite phase clock generation circuit having an input and an output, the input connected to the second phase bootstrapping circuit input and including;

an first inverter;

a second inverter connected to the first inverter;

a plurality of interconnected transistors responsive to the first inverter and connected to the second inverter;

a charge storage device connecting the interconnected transistors and the second inverter, and

a summing circuit having a main input, a supply voltage input, a clock input, and an output, the main input connected to the first bootstrapping circuit output, the supply voltage input connected to the intermediate charge pump output, the clock input connected to the opposite phase clock generation circuit output, and the output connected to the second phase bootstrapping circuit output, and including;

a plurality of interconnected transistors, and

a charge storage circuit coupling the plurality of interconnected transistors with the first bootstrapping circuit output.

12. The charge pump system as claimed in claim 8 wherein:

the charge pump circuit includes;

a charge pump input for receiving an input voltage to be pumped and connected to the power supply voltage;

a first charge pump transistor with an input and an output, the input connected to the power supply voltage;

a first charge storage device coupling the first charge pump stage with the first phase bootstrapping circuitry;

a second charge pump transistor with an input and an output, the input connected to the first charge pump stage output;

a second charge storage device coupling the second charge pump stage with the second phase bootstrapping circuitry, and

a charge pump output for providing a pumped output voltage and connected to the second charge pump stage output.

13. The charge pump system as claimed in claim 8 wherein:

the charge pump circuit has a plurality of charge pump stages connected in series, each of the charge pump stages having an input and an output; and

the charge pump circuit pumps an input voltage at the input of alternate charge pump stages to a voltage in excess of the input voltage in response to the first and second phase clock signals and provides the voltage to the output.

14. The charge pump system as claimed in claim 8 wherein:

the first and second phase bootstrapping circuits provide high amplitude first and second phase clock signals.

16. The charge pump system as claimed in claim 15 wherein:

the first phase bootstrapping circuit includes;

a first phase bootstrapping circuit input and output, the input connected to the clock;

a first bootstrapping circuit having an input and an output, the input connected to the first phase bootstrapping circuit input and including;

a CMOS inverter;

a plurality of interconnected NMOS and PMOS transistors responsive to the clock and connected to the inverter;

a plurality of capacitors for storing charge and connected to the inverter and the interconnected NMOS and PMOS transistors; and

an output from and connected to the interconnected NMOS and PMOS transistors as a feedback loop;

a second bootstrapping circuit having an input and an output, the input connected to the first phase bootstrapping circuit input and including;

an inverter;

a plurality of interconnected NMOS and PMOS transistors responsive to the clock and connected to the inverter;

a plurality of capacitors for storing charge and connected to the inverter and the interconnected NMOS and PMOS transistors; and

an output from and connected to the interconnected NMOS and PMOS transistors as a feedback loop;

an intermediate charge pump having a single charge pump stage, an input, and an output, the input connected to the second bootstrapping circuit output and including;

a first native transistor connected to the power supply voltage;

a second native transistor connected to the first native transistor and the intermediate charge pump output;

a capacitor coupling the second native transistor with the second bootstrapping circuit output;

an opposite phase clock generation circuit having an input and an output, the input connected to the first phase bootstrapping circuit input and including;

an first CMOS inverter;

a second CMOS inverter connected to the first CMOS inverter;

a plurality of interconnected NMOS and PMOS transistors responsive to the first CMOS inverter and connected to the second CMOS inverter;

a capacitor connecting the interconnected NMOS and PMOS transistors and the second CMOS inverter, and

a summing circuit having a main input, a supply voltage input, a clock input, and an output, the main input connected to the first bootstrapping circuit output, the supply voltage input connected to the intermediate charge pump output, the clock input connected to the opposite phase clock generation circuit output, and the output connected to the first phase bootstrapping circuit output and including;

a plurality of interconnected NMOS and PMOS transistors, and

a capacitor coupling the plurality of interconnected NMOS and PMOS transistors with the first bootstrapping circuit output.

17. The charge pump system as claimed in claim 15 including a portable electronic device connected to the two-stage charge pump circuit.

18. The charge pump system as claimed in claim 15 wherein:

the second phase bootstrapping circuit includes;

a first phase bootstrapping circuit input and output, the input connected to the clock;

a first bootstrapping circuit having an input and an output, the input connected to the second phase bootstrapping circuit input and including;

a CMOS inverter;

a plurality of interconnected NMOS and PMOS transistors responsive to the clock and connected to the CMOS inverter;

a plurality of capacitors for storing charge and connected to the CMOS inverter and the interconnected NMOS and PMOS transistors; and

an output from and connected to the interconnected NMOS and PMOS transistors as a feedback loop;

a second bootstrapping circuit having an input and an output, the input connected to the second phase bootstrapping circuit input and including;

a CMOS inverter;

a plurality of interconnected NMOS and PMOS transistors responsive to the clock and connected to the CMOS inverter;

a plurality of capacitors for storing charge and connected to the CMOS inverter and the interconnected NMOS and PMOS transistors; and

an output from and connected to the interconnected NMOS and PMOS transistors as a feedback loop;

an intermediate charge pump having a single charge pump stage, an input, and an output, the input connected to the second bootstrapping circuit output and including;

a first native transistor connected to the power supply voltage;

a second native transistor connected to the first native transistor and the intermediate charge pump output;

a capacitor coupling the second native transistor with the second bootstrapping circuit output;

an opposite phase clock generation circuit having an input and an output, the input connected to the second phase bootstrapping circuit input and including;

an first CMOS inverter;

a second CMOS inverter connected to the first CMOS inverter;

a plurality of interconnected NMOS and PMOS transistors responsive to the first CMOS inverter and connected to the second CMOS inverter;

a capacitor connecting the interconnected NMOS and PMOS transistors and the second CMOS inverter, and

a summing circuit having a main input, a supply voltage input, a clock input, and an output, the main input connected to the first bootstrapping circuit output, the supply voltage input connected to the intermediate charge pump output, the clock input connected to the opposite phase clock generation circuit output, and the output connected to the second phase bootstrapping circuit output and including;

a plurality of interconnected NMOS and PMOS transistors, and a capacitor coupling the plurality of interconnected NMOS and PMOS transistors with the first bootstrapping circuit output.

19. The charge pump system as claimed in claim 15 wherein:

the two-stage charge pump circuit includes;

a charge pump input for receiving an input voltage to be pumped and connected to the power supply voltage;

a first native transistor with an input and an output, the input connected to the power supply voltage;

a first capacitor coupling the first native transistor with the first phase bootstrapping circuitry;

a second native transistor with an input and an output, the input connected to the first native transistor output;

a second capacitor coupling the second native transistor with the second phase bootstrapping circuitry, and

a charge pump output for providing a pumped output voltage and connected to the second native transistor output.

20. The charge pump system as claimed in claim 15 wherein:

the two-stage charge pump circuit has two charge pump stages connected in series, each of the charge pump stages having an input and an output; and

the two-stage charge pump circuit pumps an input voltage at the input of alternate charge pump stages to a voltage in excess of the input voltage in response to the first and second phase clock signals and provides the voltage to the output.

15. A charge pump system for connection to a power supply voltage and a clock, comprising:

a first phase bootstrapping circuit responsive to the clock for providing a first phase clock signal with a fixed multiple of the power supply voltage;

a CMOS inverter responsive to the clock with an inverted clock output opposite in phase to the clock;

a second phase bootstrapping circuit responsive to the inverted clock output to provide a second phase clock signal opposite in phase to the first phase clock signal and with a fixed multiple of the power supply voltage; and

a two-stage charge pump circuit responsive to the power supply voltage and the first and second phase clocks whereby the power supply voltage is increased by alternately adding charge to the power supply voltage from the power supply voltage in each cycle of the first and second phase clock signals and whereby the first and second phase clock signals with fixed multiples of the power supply voltage allow for charge boosting in a limited number of stages.