Method for using data regarding manufacturing procedures integrated circuits (IC's) have undergone, such as repairs, to select procedures the IC's will undergo, such as additional repairs

• US 20020082740A1
• Filed: 02/05/2002
• Published: 06/27/2002
• Est. Priority Date: 06/06/1997
• Status: Active Grant

• Current Assignee: Alan G. Wood, David R. Hembree, Derek J. Gochnour, James M. Wark, John O. Jacobson, Michael E. Hess, Salman Akram, Warren M. Farnworth
• Original Assignee: Alan G. Wood, David R. Hembree, Derek J. Gochnour, James M. Wark, John O. Jacobson, Michael E. Hess, Salman Akram, Warren M. Farnworth
• Inventors: Farnworth, Warren M., Hembree, David R., Wark, James M., Wood, Alan G., Akram, Salman, Hess, Michael E., Jacobson, John O., Gochnour, Derek J.
• Granted Patent: US 6,553,276 B2
• Time in Patent Office: Days
• US Class Current: 700/121
• CPC Class Codes: G06F 11/006 Identification G06F11/2289 takes precedence
• CPC Class Codes: H01L 2223/5444 for electrical read out

Abstract

An inventive method in an integrated circuit (IC) manufacturing process for using data regarding repair procedures conducted on IC'"'"'s at probe to determine whether any further repairs will be conducted later in the manufacturing process includes storing the data in association with a fuse ID of each of the IC'"'"'s. The ID codes of the IC'"'"'s are automatically read, for example, at an opens/shorts test during the manufacturing process. The data stored in association with the ID codes of the IC'"'"'s is then accessed, and additional repair procedures the IC'"'"'s may undergo are selected in accordance with the accessed data. Thus, for example, the accessed data may indicate that an IC is unrepairable, so the IC can proceed directly to a scrap bin without having to be queried to determine whether it is repairable, as is necessary in traditional IC manufacturing processes.

Claims

1. A manufacturing process for an integrated circuit device having a substantially unique identification code using data regarding manufacturing procedures a plurality of integrated circuit devices have undergone to select manufacturing procedures for the integrated

circuit device, the process comprising:

providing memory devices;

storing data using the substantially unique identification code of each of the memory devices for identifying manufacturing procedures the memory devices have undergone, said storing data including storing data for identifying repairs performed on the memory devices and for identifying spare rows and columns available to effect repairs in the memory devices;

automatically reading the substantially unique identification code of each of the memory devices;

accessing the data stored in association with the substantially unique identification code of each of the memory devices; and

selecting manufacturing procedures for the memory devices using the accessed data; and

assembling the memory devices into packaged memory devices.

2. The process of claim 1, wherein the memory devices comprise Dynamic Random Access Memory devices.

3. The process of claim 1, wherein the storing of data comprises storing data at probe.

4. The process of claim 1, wherein automatically reading the substantially unique identification code of each of the memory devices comprises electrically retrieving a unique fuse ID programmed into each of the memory devices.

5. The process of claim 1, wherein automatically reading the substantially unique identification code of each of the memory devices comprises optically reading a unique identification code provided on each of the memory devices.

6. The process of claim 5, wherein optically reading a unique ID code provided on each of the IC'"'"'s comprises optically reading a unique laser fuse ID programmed into each of the IC'"'"'s.

7. The process of claim 1, wherein automatically reading the ID code of each of the memory devices comprises automatically reading the substantially unique identification code of each of the memory devices at one of an opens/shorts test, a burn-in test, and a back-end test in the manufacturing process.

8. The process of claim 1, wherein accessing the data stored in association with the substantially unique identification code of each of the memory devices comprises accessing the data stored in association with the substantially unique identification code of each of the memory devices at one of an opens/shorts test, a burn-in test, and a back-end test in the manufacturing process.

9. The process of claim 1, wherein selecting manufacturing procedures for the memory devices using the accessed data comprises selecting repairs for the memory devices using the accessed data.

10. The process of claim 9, wherein the memory devices comprise Dynamic Random Access Memory devices, wherein selecting repairs for the memory devices comprises selecting spare rows and columns that will be used to repair the DRAM devices.

11. The process of claim 1, wherein selecting manufacturing procedures for the memory devices using the accessed data comprises selecting whether the memory devices will require repair procedures.

12. The process of claim 11, wherein the memory devices comprise Dynamic Random Access Memory devices, wherein selecting whether the memory devices require repair procedures comprises selecting whether the DRAM devices will be repaired using the accessed data indicating that enough spare rows and columns are available in a memory device to effect repairs.

13. The process of claim 1, wherein selecting manufacturing procedures for the memory devices using the accessed data comprises determining whether the memory devices will be assembled into Multi-Chip Modules using the accessed data for indicating the memory device are repairable.

14. The process of claim 1, further comprising assembling the memory devices into packaged memory devices after the step of storing data and before the step of automatically reading the substantially unique identification code of each of the memory devices.

16. The method of claim 15, further comprising:

selecting manufacturing procedures for devices using the accessed data.

17. The method of claim 15, wherein fabricating a plurality of devices on each wafer of the plurality of wafers comprises fabricating devices selected from a group comprising Dynamic Random Access Memory (DRAM) IC'"'"'s, Static Random Access Memory (SRAM) IC'"'"'s, Synchronous DRAM (SDRAM) IC'"'"'s, and processor IC'"'"'s.

18. The method of claim 15, wherein causing each device of the device on each wafer of the plurality of wafers to store a substantially unique identification code comprises programming each device of the devices on each wafer of the plurality of wafers to permanently store a substantially unique identification fuse ID.

19. The method of claim 15, wherein programming each device of the devices on each wafer of the plurality of wafers to permanently store a unique fuse ID comprises programming at least one of fuses and anti-fuses in each device of the devices on each wafer of the plurality of wafers to permanently store a unique fuse ID.

20. The method of claim 15, wherein assembling each die the plurality of dice into a semiconductor device comprises assembling each die of the plurality of dice into a semiconductor device selected from a group comprising a wire bond/lead frame semiconductor device, a Chip-On-Board semiconductor device, and a flip-chip semiconductor device.

15. A manufacturing method for integrated circuit devices from semiconductor wafers comprising:

providing a plurality of semiconductor wafers;

fabricating a plurality of devices on each wafer of the plurality of wafers;

causing each device of the devices on each wafer of the plurality of wafers to store a substantially unique identification code;

storing data using substantially unique identification code of each device of the devices for identifying manufacturing procedures for the devices;

separating each of the devices on each wafer of the plurality of wafers for forming one die of a plurality of dice;

assembling each die of the plurality of dice into an semiconductor device, said assembling including;

picking die of the plurality of dice from its wafer;

placing each die of the plurality of dice onto an epoxy coated bonding site of one lead frame of a plurality of lead frames;

curing the epoxy on the bonding site of each lead frame of the plurality of lead frames;

wire bonding each die of the plurality of dice to an associated lead frame;

encapsulating each die of the plurality of dice and an associated lead frame for forming one package of a plurality of packages, each package having projecting leads;

curing each package of the plurality of packages;

de-flashing the projecting leads of each package of the plurality of packages;

electroplating the projecting leads of each package of the plurality of packages; and

singulating each package of the plurality of packages into one semiconductor device package of a plurality of semiconductor device packages;

automatically reading the substantially unique identification code associated with each semiconductor device package of the plurality of semiconductor devices packages; and

accessing the data stored using substantially unique identification code associated with each semiconductor device package of the plurality of semiconductor device packages.

21. A method of manufacturing Multi-Chip Modules from semiconductor wafers comprising:

fabricating a plurality of semiconductor devices on each wafer of a plurality of wafers, each semiconductor device comprising a Dynamic Random Access Memory;

causing each of the semiconductor devices on each wafer of the plurality of wafers to store a substantially unique identification code;

storing data in association with the substantially unique identification code of each semiconductor device of the plurality of semiconductor devices for identifying manufacturing procedures for the plurality of semiconductor devices, said storing data including storing data for identifying repairs performed on the semiconductor device and for identifying spare rows and columns available to effect repairs in the semiconductor device;

separating each semiconductor device of the plurality of semiconductor devices on each wafer of the wafers from its wafer for forming one semiconductor device of a plurality of semiconductor devices;

assembling at least two semiconductor devices into each Multi-Chip-Module of a plurality of Multi-Chip-Modules;

automatically reading the substantially unique identification code of each semiconductor device f the semiconductor devices in each Multi-Chip-Module of a plurality of Multi-Chip-Modules; and

accessing the data stored using the substantially unique code of each semiconductor device of the plurality of semiconductor devices in each Multi-Chip-Module of a plurality of Multi-Chip-Modules.

22. The method of claim 21, further comprising:

selecting manufacturing procedures for the plurality of semiconductor devices using the accessed data.

23. The method of claim 21, wherein the Multi-Chip-Module of a plurality of Multi-Chip-Modules are selected from a group comprising Single In-Line Memory Modules (SIMM'"'"'s) and Dual In-line Memory Modules (DIMM'"'"'s).

25. The method of claim 24, wherein mounting the wafers comprises mounting each semiconductor wafer of the semiconductor wafers on an ultraviolet adhesive film and exposing the ultraviolet adhesive film to ultraviolet light for loosening the semiconductor wafers from the film prior to picking and placing the semiconductor die.

26. The method of claim 24, further comprising receiving a plurality of unrepairable semiconductor die diverted from another manufacturing process for assembly into semiconductor devices.

28. The method of claim 27, further comprising plasma cleaning each of the MCM'"'"'s after curing the epoxy.

29. The method of claim 27, wherein mounting the wafers comprises mounting each of the wafers on an ultraviolet adhesive film and exposing the ultraviolet adhesive film to ultraviolet light to loosen the wafers from the film.

30. The method of claim 27, further comprising singulating the printed circuit boards associated with each of the MCM'"'"'s.

24. A manufacturing method for semiconductor devices from semiconductor wafers, the method comprising:

fabricating a plurality of semiconductor devices on each semiconductor wafer of the semiconductor wafers;

electronically probing each semiconductor device of the semiconductor devices on each semiconductor wafer of the semiconductor wafers for identifying good, bad and repairable semiconductor devices on each semiconductor wafer of the semiconductor wafers;

repairing the repairable semiconductor devices;

programming each semiconductor device of the semiconductor devices on each semiconductor wafer of the semiconductor wafers to store a unique fuse identification;

storing data in association with the fuse identification of each semiconductor device of the semiconductor devices identifying repairs performed on each semiconductor device of the semiconductor devices;

mounting each semiconductor wafer of the semiconductor wafers on an adhesive film;

sawing each semiconductor device of the semiconductor devices on each semiconductor wafer of the semiconductor wafers for forming one of a plurality of discrete semiconductor devices;

automatically picking each semiconductor device of the semiconductor devices from a semiconductor wafer;

placing each semiconductor device of the semiconductor devices onto an epoxy coated bonding site of one lead frame of a plurality of lead frames;

curing the epoxy on the bonding site of each lead frame of the plurality of lead frames;

wire bonding each semiconductor device of the semiconductor devices to an associated lead frame;

encapsulating each semiconductor device of the semiconductor devices and an associated lead frame for forming one semiconductor device package of a plurality of semiconductor device packages each semiconductor device package having projecting leads;

curing each semiconductor device package of the plurality of semiconductor device packages;

de-flashing the projecting leads of each semiconductor device package of the plurality of semiconductor device packages;

electroplating the projecting leads of each semiconductor device package of the plurality of semiconductor device packages;

singulating each semiconductor device package of the plurality of semiconductor device packages;

testing each semiconductor device package of the plurality of semiconductor devices for opens and shorts;

burn-in testing each semiconductor device package of the plurality of semiconductor device packages;

back-end testing each semiconductor device package of the plurality of semiconductor device packages;

automatically reading the identification code of each semiconductor device package of the semiconductor device packages;

accessing the data stored using the identification code of each semiconductor device package of the semiconductor device packages;

for any semiconductor device package failing any one of the opens/shorts, burn-in, and back-end tests, evaluating the accessed data to determine whether the failing semiconductor device package may be repaired;

repairing any semiconductor package device determined in accordance with the accessed data to be repairable and returning the repaired semiconductor device package to the semiconductor manufacturing process; and

discarding any of the semiconductor device package determined in accordance with the accessed data to be unrepairable.

27. A manufacturing method for Multi-Chip Modules (MCM'"'"'s) from semiconductor wafers using Chip-On-Board (COB) techniques, the method comprising:

electronically probing each of a plurality of semiconductor devices on each wafer of a plurality of wafers for identifying good, bad and repairable semiconductor devices;

repairing the repairable semiconductor devices;

programming each semiconductor device of the semiconductor devices to store a unique fuse identification;

storing an electronic wafer map for each wafer that identifies the locations of good and bad semiconductor devices on the wafer using a fuse ID of the semiconductor device;

storing data in association with the fuse ID of each semiconductor device of the semiconductor devices identifying repairs;

mounting each wafer of the plurality of wafers on an adhesive film;

sawing each wafer of the plurality of wafers forming a plurality of discrete semiconductor dice;

accessing the stored wafer map for each wafer;

accessing the stored data for each semiconductor device;

automatically picking each of the good semiconductor device from a wafer;

discarding non-picked semiconductor devices identified as bad by the accessed wafer maps;

diverting picked semiconductor devices identified as good but unrepairable by the accessed wafer maps and data to a non-MCM semiconductor manufacturing process;

placing picked semiconductor devices identified as good and repairable by the accessed wafer maps onto epoxy coated bonding sites of a plurality of printed circuit boards using COB techniques to form a plurality of MCM'"'"'s;

curing the epoxy;

wire bonding each semiconductor device of the semiconductor devices to its associated MCM;

testing each semiconductor device of the semiconductor devices on each of the MCM'"'"'s for opens and shorts;

encapsulating each semiconductor device of the semiconductor devices;

retesting each semiconductor device of the semiconductor devices for opens and shorts;

burn-in testing each semiconductor device of the semiconductor devices;

back-end testing each semiconductor device of the semiconductor devices;

automatically reading the ID code of each semiconductor device;

accessing the data stored in association with the ID code of each semiconductor device of the semiconductor devices;

for any semiconductor device failing any one of the opens/shorts, burn-in, and back-end tests, evaluating the accessed data to determine whether the failing semiconductor device may be repaired;

repairing any semiconductor device determined in accordance with the accessed data to be repairable and returning the repaired MCM'"'"'s to the manufacturing process; and

replacing any semiconductor device determined in accordance with the accessed data to be unrepairable using a Known Good Die (KGD) dice and returning the repaired MCM'"'"'s to the manufacturing process.

31. A manufacturing method for Multi-Chip Modules (MCM'"'"'s) from semiconductor wafers using flip-chip techniques, the method comprising:

electronically probing each semiconductor device of the semiconductor wafers to identify good, bad and repairable semiconductor devices;

repairing the repairable semiconductor devices;

programming each semiconductor device of the semiconductor wafers to store a unique fuse identification (ID);

storing an electronic wafer map for each wafer for identifying the locations of good and bad semiconductor devices using a fuse ID;

storing data in association with the fuse ID of the semiconductor devices identifying repairs;

mounting the semiconductor wafers on an adhesive film;

sawing the semiconductor wafers;

accessing the stored wafer map for the semiconductor wafers;

accessing the stored data for each of the devices on each of the wafers;

automatically picking the good semiconductor devices;

discarding non-picked semiconductor devices;

diverting picked semiconductor devices identified as good but unrepairable by the accessed wafer maps and data to a non-MCM device manufacturing process;

flip-chip attaching picked semiconductor devices identified as good and repairable by the accessed wafer maps and data to a plurality of MCM'"'"'s;

testing the semiconductor devices of the plurality of MCM'"'"'s for opens and shorts;

encapsulating the plurality of MCM'"'"'s;

retesting the semiconductor devices on the plurality of MCM'"'"'s for opens and shorts;

burn-in testing the semiconductor devices of the plurality of MCM'"'"'s;

back-end testing the semiconductor devices of the plurality of MCM'"'"'s;

automatically reading the ID code of the semiconductor devices of the plurality of MCM'"'"'s;

accessing the data stored in association with the ID code of the semiconductor devices;

for any semiconductor device failing any one of the opens/shorts, burn-in, and back-end tests, evaluating the accessed data to determine whether the failing semiconductor device may be repaired;

repairing any semiconductor device determined in accordance with the accessed data to be repairable and returning the repaired MCM'"'"'s to the manufacturing process; and

replacing any of the semiconductor device determined in accordance with the accessed data to be unrepairable with a Known Good Die (KGD) die and returning the repaired MCM'"'"'s to the manufacturing process.

32. The method of claim 31, wherein mounting the wafers comprises mounting the wafers on an ultraviolet adhesive film and exposing the ultraviolet adhesive film to ultraviolet light to loosen the wafers from the film.

33. The method of claim 31, further comprising singulating the MCM'"'"'s to form discrete MCM'"'"'s.

35. The method of claim 34, further comprising:

assembling semiconductor devices identified as good and repairable into MCM'"'"'s.

34. A manufacturing method for Multi-Chip Module (MCM) for diverting good but unrepairable semiconductor devices from the process, the MCM having semiconductor devices having a substantially unique identification (ID) code, the method comprising:

storing data in association with the ID code of at least some of the semiconductor devices for identifying semiconductor devices that are good and repairable, that are good but unrepairable, and that are bad;

automatically reading the ID code of at some of the semiconductor devices;

accessing the data stored in association with the ID code of at least some of the semiconductor devices;

diverting semiconductor devices identified as good but unrepairable to other semiconductor device manufacturing processes; and

discarding semiconductor devices identified as bad.