Wireless communication system using block filtering and fast equalization-demodulation and method of operation

• US 20020086707A1
• Filed: 04/20/2001
• Published: 07/04/2002
• Est. Priority Date: 11/15/2000
• Status: Active Grant

• Current Assignee: Access Solutions, Ltd. (LOXAM SAS)
• Original Assignee: Access Solutions, Ltd. (LOXAM SAS)
• Inventors: McKown, Russell C., Struhsaker, Paul F.
• Granted Patent: US 7,075,967 B2
• Time in Patent Office: Days
• US Class Current: 455/561
• CPC Class Codes: H01Q 1/246 specially adapted for base stations
• CPC Class Codes: H04B 7/022 Site diversity; Macro-diversity using two or more spaced independent antennas H04B7/04
• CPC Class Codes: H04L 1/004 by using forward error control H04L1/0618 takes precedence; coding, decoding or code conversion, for error detection or correction H03M13/00
• CPC Class Codes: H04L 12/10 Current supply arrangements
• CPC Class Codes: H04L 27/2647 Arrangements specific to the receiver only equalisation H04L27/01
• CPC Class Codes: H04M 2207/206 composed of PSTN and wireless network
• CPC Class Codes: H04M 2242/04 for emergency applications
• CPC Class Codes: H04M 2242/06 Lines and connections with preferential service
• CPC Class Codes: H04M 3/42 Systems providing special services or facilities to subscribers specially adapted for wireless communication networks H04W4/00
• CPC Class Codes: H04W 16/28 using beam steering
• CPC Class Codes: H04W 24/04 Arrangements for maintaining operational condition
• CPC Class Codes: H04W 4/90 Services for handling of emergency or hazardous situations, e.g. earthquake and tsunami warning systems [ETWS]
• CPC Class Codes: H04W 76/50 for emergency connections
• CPC Class Codes: H04W 84/14 WLL [Wireless Local Loop]; RLL [Radio Local Loop]
• CPC Class Codes: H04W 88/08 Access point devices

Abstract

There is disclosed a transceiver for use in a base station (BS) of a fixed wireless network that communicates with a plurality of subscriber transceivers via time division duplex (TDD) channels. The BS transceiver comprises: 1) a receiver front-end for receiving data burst transmissions from the plurality of subscriber transceivers in an uplink portion of a TDD channel, wherein the receiver front-end demodulates the received data burst transmissions into a digital baseband signal in-phase (I) signal and a digital baseband quadrature (Q) signal; 2) a first frequency domain feedforward equalization filter for receiving the I signal and performing a Fast Fourier Transform on a block of N symbols in the I signal to produce a first symbol estimate sequence; 3) a second frequency domain feedforward equalization filter for receiving the Q signal and performing a Fast Fourier Transform on a block of N symbols in the Q signal to produce a second symbol estimate sequence; 4) an adder for receiving the first signal estimate sequence on a first input and the second signal estimate sequence on a second input and producing a combined symbol estimate sequence; 5) a slicer for receiving and quantizing the combined symbol estimate sequence to produce a sequence of decided symbols; and 6) a time domain feedback filter for receiving the sequence of decided symbols and generating a symbol correction sequence that is applied to a third input of the adder.

Claims

1. For use in a base station (BS) of a fixed wireless network capable of communicating with a plurality of subscriber transceivers via time division duplex (TDD) channels, a BS transceiver comprising:

a receiver front-end capable of receiving data burst transmissions from said plurality of subscriber transceivers in an uplink portion of a TDD channel, wherein said receiver front-end demodulates said received data burst transmissions into a digital baseband signal in-phase (I) signal and a digital baseband quadrature (Q) signal;

a first frequency domain feedforward equalization filter capable of receiving said I signal and performing a Fast Fourier Transform on a block of N symbols in said I signal to produce a first symbol estimate sequence;

a second frequency domain feedforward equalization filter capable of receiving said Q signal and performing a Fast Fourier Transform on a block of N symbols in said Q signal to produce a second symbol estimate sequence;

an adder capable of receiving said first signal estimate sequence on a first input and said second signal estimate sequence on a second input and producing a combined symbol estimate sequence;

a slicer capable of receiving and quantizing said combined symbol estimate sequence to produce a sequence of decided symbols; and

a time domain feedback filter capable of receiving said sequence of decided symbols and generating a symbol correction sequence that is applied to a third input of said adder.

2. The BS transceiver as set forth in claim 1 wherein said first frequency domain feedforward equalization filter is 2/T fractionally spaced, where T is a period of said block of said N symbols.

3. The BS transceiver as set forth in claim 2 wherein said second frequency domain feedforward equalization filter is 2/T fractionally spaced, where T is a period of said block of said N symbols.

4. The BS transceiver as set forth in claim 1 wherein said time domain feedback filter comprises a delay line comprising D delay taps.

5. The BS transceiver as set forth in claim 4 wherein said time domain feedback filter uses C feedback coefficients to generate said symbol correction sequence, where C is less than D.

6. The BS transceiver as set forth in claim 5 wherein said feedback filter is a RAKE filter.

7. The BS transceiver as set forth in claim 1 further comprising a channel estimation circuit capable of detecting a preamble sequence of symbols in at least one of said I and Q signals and producing therefrom a first plurality of feedforward coefficients usable by said first frequency domain feedforward equalization filter.

8. The receiver as set forth in claim 7 wherein said channel estimation circuit produces a second plurality of feedforward coefficients usable by said first frequency domain feedforward equalization filter.

9. The receiver as set forth in claim 1 wherein N=16.

10. A fixed wireless network comprising:

a plurality of base stations capable of communicating with a plurality of subscriber transceivers via time division duplex (TDD) channels, each said base station having a base station (BS) transceiver comprising;

a receiver front-end capable of receiving data burst transmissions from said plurality of subscriber transceivers in an uplink portion of a TDD channel, wherein said receiver front-end demodulates said received data burst transmissions into a digital baseband signal in-phase (I) signal and a digital baseband quadrature (Q) signal;

a first frequency domain feedforward equalization filter capable of receiving said I signal and performing a Fast Fourier Transform on a block of N symbols in said I signal to produce a first symbol estimate sequence;

a second frequency domain feedforward equalization filter capable of receiving said Q signal and performing a Fast Fourier Transform on a block of N symbols in said Q signal to produce a second symbol estimate sequence;

an adder capable of receiving said first signal estimate sequence on a first input and said second signal estimate sequence on a second input and producing a combined symbol estimate sequence;

a slicer capable of receiving and quantizing said combined symbol estimate sequence to produce a sequence of decided symbols; and

a time domain feedback filter capable of receiving said sequence of decided symbols and generating a symbol correction sequence that is applied to a third input of said adder.

11. The fixed wireless network as set forth in claim 10 wherein said first frequency domain feedforward equalization filter is 2/T fractionally spaced, where T is a period of said block of said N symbols.

12. The fixed wireless network as set forth in claim 11 wherein said second frequency domain feedforward equalization filter is 2/T fractionally spaced, where T is a period of said block of said N symbols.

13. The fixed wireless network as set forth in claim 10 wherein said time domain feedback filter comprises a delay line comprising D delay taps.

14. The fixed wireless network as set forth in claim 13 wherein said time domain feedback filter uses C feedback coefficients to generate said symbol correction sequence, where C is less than D.

15. The fixed wireless network as set forth in claim 14 wherein said feedback filter is a RAKE filter.

16. The fixed wireless network as set forth in claim 10 further comprising a channel estimation circuit capable of detecting a preamble sequence of symbols in at least one of said I and Q signals and producing therefrom a first plurality of feedforward coefficients usable by said first frequency domain feedforward equalization filter.

17. The fixed wireless network as set forth in claim 16 wherein said channel estimation circuit produces a second plurality of feedforward coefficients usable by said first frequency domain feedforward equalization filter.

18. The fixed wireless network as set forth in claim 10 wherein N=16.