Thin-film semiconductor device and method of manufacturing the same

• US 20020100941A1
• Filed: 01/31/2002
• Published: 08/01/2002
• Est. Priority Date: 01/31/2001
• Status: Abandoned Application

• Current Assignee: Canon Ayutthaya Limited (Canon Inc.)
• Original Assignee: Canon Ayutthaya Limited (Canon Inc.)
• Inventors: Sakaguchi, Kiyofumi, Yonehara, Takao
• Application Number:
  US10/059,144
• Publication Number:
  US 20020100941A1
• Time in Patent Office: Days
• US Class Current: 257/359
• CPC Class Codes: H01L 21/3063 Electrolytic etching
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 2221/68359 used as a support during manufacture of interconnect decals or build up layers
• CPC Class Codes: H01L 2221/68363 used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
• CPC Class Codes: H01L 2221/68368 used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83001 involving a temporary auxiliary member not forming part of the bonding apparatus
• CPC Class Codes: H01L 2224/83191 wherein the layer connectors are disposed only on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/838 Bonding techniques
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 2224/92247 the second connecting process involving a wire connector
• CPC Class Codes: H01L 23/5389 : the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 25/0655 : the devices being arranged next to each other
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01004 : Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01031 : Gallium [Ga]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01039 : Yttrium [Y]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/01072 : Hafnium [Hf]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/0132 : Binary Alloys
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H01L 2924/3512 : Cracking

Abstract

A thin-film semiconductor device with a reduced influence on a device formation layer in separation and a method of manufacturing the device are provided. The manufacturing method includes the step of preparing a member having a semiconductor film with a semiconductor element and/or semiconductor integrated circuit on a separation layer, the separation step of separating the member at the separation layer by a pressure of a fluid, and the chip forming step of, after the separation step, forming the semiconductor film into chips.

Claims

1. A method of manufacturing a thin-film semiconductor device, comprising:

the step of preparing a member having a semiconductor film with a semiconductor element and/or semiconductor integrated circuit on a separation layer;

the separation step of separating the member at the separation layer by a pressure of a fluid; and

the chip forming step of, after the separation step, forming the semiconductor film into chips.

2. The method according to claim 1, wherein the member is obtained by forming a porous layer on a surface of a semiconductor substrate, forming the semiconductor film on a surface of the porous layer, and then forming the semiconductor element and/or semiconductor integrated circuit.

3. The method according to claim 2, wherein the semiconductor film is formed on the surface of the porous layer after forming a protective film on inner walls of pores in the porous layer.

4. The method according to claim 1, wherein the member is obtained by forming the semiconductor element and/or semiconductor integrated circuit on a surface of a semiconductor substrate and implanting ions from the surface side to a predetermined depth to form the separation layer.

5. The method according to claim 2, wherein the semiconductor substrate is a single-crystal silicon substrate or a compound semiconductor substrate.

6. The method according to claim 4, wherein the semiconductor substrate is a single-crystal silicon substrate or a compound semiconductor substrate.

7. The method according to claim 1, wherein the separation step is executed by applying the pressure of the fluid to the separation layer.

8. The method according to claim 1, wherein after the separation step, the separation layer remaining on the semiconductor film side is removed, and then, the chip forming step is executed.

9. The method according to claim 1, wherein after the separation step and the chip forming step, the step of removing the separation layer remaining on the semiconductor film side is executed.

10. A method of manufacturing a thin-film semiconductor device, comprising:

the step of preparing a member having a semiconductor film with a semiconductor element and/or semiconductor integrated circuit on a separation layer;

the chip forming step of forming the member into chips in desired regions; and

the separation step of, after the chip forming step, separating the member at the separation layer.

11. A thin-film semiconductor device obtaining by processing a member having a semiconductor film with a semiconductor element and/or semiconductor integrated circuit on a separation layer, the process comprising:

the separation step of separating the member at the separation layer by a pressure of a fluid; and

the chip forming step of, after the separation step, forming the semiconductor film into chips.

12. A thin-film semiconductor device obtaining by processing a member having a semiconductor film with a semiconductor element and/or semiconductor integrated circuit on a separation layer, the process comprising:

the chip forming step of forming the member into chips in desired regions; and

the separation step of, after the chip forming step, separating the member at the separation layer.