Integrated beamformer/modem architecture

• US 20020154687A1
• Filed: 02/28/2002
• Published: 10/24/2002
• Est. Priority Date: 02/28/2001
• Status: Active Grant

• Current Assignee: Lionra Technologies Limited (Atlantic IP Services Limited)
• Original Assignee: ITT Manufacturing Enterprises, Inc. (ITT, Inc.)
• Inventors: Weinberg, Aaron, Harlacher, Marc, Bierly, Scott, Smarrelli, Robert
• Granted Patent: US 7,260,141 B2
• Time in Patent Office: Days
• US Class Current: 375/222
• CPC Class Codes: H01Q 3/26 varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture H01Q3/12, H01Q3/22, H01Q3/24 take precedence
• CPC Class Codes: H01Q 3/30 varying the relative phase between the radiating elements of an array H01Q3/2605, H01Q3/2658, H01Q3/2682, H01Q3/44 take precedence
• CPC Class Codes: H04B 7/0617 for beam forming
• CPC Class Codes: H04B 7/086 using weights depending on external parameters, e.g. direction of arrival [DOA], predetermined weights or beamforming

Abstract

A transceiver employing a steerable phased-array antenna includes a modem architecture in which signals from each antenna element in the array are independently processed down to the individual baseband channel level, and digital beamforming is performed at baseband. The data rate reduction from IF to baseband permits parallel signal data from multiple antenna elements to be time multiplexed and serially processed at acceptable data rates at baseband with minimal modem hardware requirements. Both for transmit signal modulation and received signal demodulation, the computation of carrier tracking, automatic gain control (AGC)/power-control, and beamforming are shared by the same processing circuitry for all channels when performed at baseband. The resulting baseband circuitry is only incrementally larger than that required for carrier tracking and AGC alone, yet accomplishes independent beamforming for each antenna element on each user channel.

Claims

1. An apparatus for modulating and demodulating signals transmitted and received via an electronically steerable phased array antenna comprising a plurality of antenna elements, the apparatus comprising:

a baseband modulator configured to modulate signals to be transmitted via the phased array antenna;

a baseband demodulator configured to demodulate signals received via the phased array antenna; and

a shared baseband processor configured to receive baseband signals including the modulated signals from said baseband modulator and the signals received via the phased array antenna which are destined for said baseband demodulator, said shared baseband processor adjusting phases of the baseband signals to jointly account for beamforming phase rotation of individual antenna elements and carrier phase rotation, and adjusting amplitudes of the baseband signals to jointly perform power control and antenna element beam scaling.

2. The apparatus of claim 1, wherein said baseband signals received by said shared baseband processor are time multiplexed, and said shared baseband processor operates on said baseband signals on a time-slot-by-time-slot basis.

3. The apparatus of claim 1, wherein said baseband modulator receives data symbols from a plurality of user channels and supplies to said shared baseband processor a time-multiplexed stream of modulated data symbols from said plurality of user channels.

4. The apparatus of claim 3, wherein, for each input data symbol, said baseband modulator generates a plurality of modulated data symbols in the time-multiplexed stream respectively corresponding to the plurality of antenna elements.

5. The apparatus of claim 1, wherein said shared baseband processor comprises:

a numerically controlled oscillator configured to generate a stream of carrier phases for baseband signals of each of a plurality of user channels in a time-multiplexed manner;

a beamforming phase rotator configured to generate a stream of beam rotation phases corresponding to individual antenna elements for each of the plurality of user channels in a time-multiplexed manner;

a phase adder configured to sum the beam rotation phases and the carrier phases to produce a time-multiplexed stream of combined phase adjustments; and

a complex multiplier configured to adjust phases of a time-multiplexed stream of baseband signals corresponding to the plurality of user channels in accordance with the combined phase adjustments.

6. The apparatus of claim 5, wherein said combined phase adjustments index a sine/cosine lookup table which supplies multiplicands to said complex multiplier.

7. The apparatus of claim 1, wherein said shared baseband processor comprises a multiplier which performs complex multiplication on baseband signals relating to a plurality of user channels in a time-multiplexed manner.

8. The apparatus of claim 1, wherein said shared baseband processor comprises a multiplier which performs complex multiplication on baseband signals associated with a plurality of individual antenna elements in a time-multiplexed manner.

9. The apparatus of claim 1, wherein said shared baseband processor comprises a beam scaling and power control processor configured to generate a time-multiplexed stream of gain control signals for baseband signals corresponding to individual antenna elements for each of a plurality of user channels, the gain control signals jointly accounting for power control and antenna element beam scaling;

and

a multiplier configured to adjust amplitudes of a time-multiplexed stream of baseband signals corresponding to the plurality of user channels in accordance with the gain control signals.

10. The apparatus of claim 1, further comprising:

a baseband beamformer configured to receive time-multiplexed baseband signals from said shared baseband processor corresponding to individual antenna elements, said baseband processor forming a combined signal from said time-multiplex baseband signals.

11. The apparatus of claim 1, further comprising:

a plurality of digital down-converters respectively down-converting digitized signals received from the plurality of antenna elements to produce parallel streams of sampled baseband signals; and

a multiplexer receiving the parallel streams of sampled baseband signals and supplying a time-multiplexed stream of the sampled baseband signals to said shared baseband processor.

12. The apparatus of claim 11, wherein said plurality of digital down-converters perform decimation to reduce a sampling rate of the digitized signals.

13. The apparatus of claim 11, wherein said plurality of digital down-converters separately down-convert digitized signals for each antenna element for each of a plurality of frequency channels.

14. The apparatus of claim 1, further comprising:

a demultiplexer receiving a time-multiplexed stream of baseband signals from said shared baseband processor and generating parallel streams of baseband signals corresponding to the plurality of antenna elements; and

a plurality of digital up-converters respectively up-converting the parallel streams of baseband signals to produce a plurality of digitized intermediate frequency signals corresponding to the plurality of antenna elements.

15. The apparatus of claim 14, wherein said plurality of digital up-converters perform interpolation to increase a sampling rate of the digitized intermediate frequency signals.

16. The apparatus of claim 14, wherein said plurality of digital up-converters separately up-convert baseband signals for each antenna element for each of a plurality of frequency channels.

17. The apparatus of claim 1, wherein signals are transmitted and received using time division duplex, said apparatus further comprising switching elements to selectively connect said shared baseband processor to said baseband modulator and front-end transmit circuitry for signal transmission and to said baseband demodulator and front-end receive circuitry for signal reception.

18. The apparatus of claim 1, wherein said apparatus employs time division multiple access (TDMA) to transmit and receive signals.

19. The apparatus of claim 1, wherein said apparatus employs frequency division multiple access (FDMA) to transmit and receive signals.

20. The apparatus of claim 1, wherein said apparatus is a field programmable gate array (FPGA).

21. The apparatus of claim 1, wherein the apparatus is implemented via a very large scale integration (VLSI) circuit or an application specific integrated circuit (ASIC).

22. The apparatus of claim 1, wherein said apparatus is a modem.

23. The apparatus of claim 1, wherein said apparatus is a transceiver.

24. The apparatus of claim 1, wherein said apparatus is a basestation transceiver.