On-chip integrated mixer with balun circuit and method of making the same

• US 20020163375A1
• Filed: 10/30/2001
• Published: 11/07/2002
• Est. Priority Date: 05/03/2001
• Status: Active Grant

• Current Assignee: pSemi Corporation (Murata Manufacturing Co Limited)
• Original Assignee: Peeregrine Semiconductor Corporation
• Inventors: Rodgers, Paul L., Wu, John C., Kelly, David E., Mohr, Jeff T.
• Granted Patent: US 6,653,885 B2
• Time in Patent Office: Days
• US Class Current: 327/356
• CPC Class Codes: H01L 27/0617 comprising components of the field-effect type H01L27/0251 takes precedence
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 29/78657 SOS transistors
• CPC Class Codes: H03D 2200/0023 Balun circuits
• CPC Class Codes: H03D 2200/0084 Lowering the supply voltage and saving power
• CPC Class Codes: H03D 2200/0088 Reduction of intermodulation, nonlinearities, adjacent channel interference; intercept points of harmonics or intermodulation products
• CPC Class Codes: H03D 7/1441 using field-effect transistors H03D7/145 takes precedence
• CPC Class Codes: H03D 7/1458 Double balanced arrangements, i.e. where both input signals are differential
• CPC Class Codes: H03D 7/1466 Passive mixer arrangements

Abstract

A radio frequency (RF) mixing device wherein RF core circuit elements requiring signal splitting are provided with one or more signal splitting element(s) (“balun(s)”) integrated on-chip with the core RF circuit elements. The RF mixing device comprises one or more RF circuit element(s) integrated on a common substrate with one or more balun(s), wherein the common substrate is an insulating substrate further provided with associated silicon-based CMOS circuitry formed in a thin, highly crystalline silicon layer formed on the insulating substrate. The insulating substrate is selected from transparent crystalline materials such as sapphire, spinel, etc. The common substrate is preferably ultrathin silicon-on-sapphire.

Claims

1. A single chip RF mixing device, comprising:

first and second MOS transistors;

a first balun circuit comprising a first input port for receiving a local oscillator (LO) signal, a first output port for providing a first signal to a gate of said first MOS transistor and a second output port for providing a second signal to a gate of said second MOS transistor, said first balun circuit further comprising a first plurality of inductors and a first plurality of capacitors; and

an RF input port for providing an RF input signal to sources of said first and second MOS transistors, wherein said first and second MOS transistors, said first plurality of inductors, and said first plurality of capacitors are integrated in a silicon-on-insulator substrate within a single chip so as to provide a single chip RF mixing device having a conversion loss of less than approximately 7 dB.

2. The device of claim 1, wherein said first plurality of inductors each comprise at least three metal layers separated by intermetal dielectric layers, wherein said at least three metal layers are shorted to one another by means of via holes through said intermetal dielectric layers.

3. The device of claim 2 wherein a thickness of a top metal layer of said at least three metal layers is approximately 1-6 microns thick, a thickness of a middle layer of said at least three metal layers is approximately 0.6-1 microns thick and a thickness of a bottom layer of said at least three metal layers is approximately 0.6-1 micron thick.

4. The device of claim 3 wherein the impedance of said first plurality of inductors matches a respective impedance of said gates of said first and second MOS transistors when they are in an ON state and operating in a passive mode so as to provide less than 10 dB return loss.

5. The device of claim 1 wherein said silicon-on-insulator substrate is an ultra-thin silicon on sapphire (UTSi) substrate.

6. The device of claim 5 further characterized by a third order non-linearity parameter input IP3 of greater than approximately 30 dBm.

7. The device of claim 1 further comprising:

third and fourth MOS transistors;

a second balun circuit comprising a second plurality of inductors, a second plurality of capacitors, a second input port for receiving said RF input signal, a third output port for providing a third signal to said sources of said first and second MOS transistors, and a fourth output port for providing a fourth signal to sources of said third and fourth MOS transistors;

wherein said first output port of said first balun circuit further provides said first signal to a gate of said fourth MOS transistor and said second output port of said first balun circuit further provides said second signal to a gate of said third MOS transistor; and

wherein said first, second, third and fourth MOS transistors, said first and second plurality of inductors, and said first and second plurality of capacitors are integrated in a silicon-on-insulator substrate within a single chip so as to provide a single chip RF mixing device having a conversion loss of less than approximately 7 dB.

8. The device of claim 8, wherein said first and second plurality of inductors each comprise at least three metal layers separated by intermetal dielectric layers, wherein said at least three metal layers are electrically connected to one another by means of via holes through said intermetal dielectric layers.

9. The device of claim 8 wherein said first plurality of inductors are designed to match a respective impedance of said gates of said first and second MOS transistors when they are in an ON state and operating in a passive mode so as to provide less than 20 dB return loss.

10. The device of claim 8 wherein said silicon-on-insulator substrate is an ultra-thin silicon on sapphire (UTSi) substrate.

11. The device of claim 8 further characterized by a third order non-linearity parameter input IP3 of greater than 30 dBM.