Power amplifier embedded cell bias detection, methods of detecting bias in power amplifiers and systems utilizing embedded cell bias detection

• US 20020180533A1
• Filed: 05/29/2001
• Published: 12/05/2002
• Est. Priority Date: 05/29/2001
• Status: Active Grant

• Current Assignee: Unwired Planet LLC (JP Morgan Chase & Co)
• Original Assignee: Ericsson, Inc. (Telefonaktiebolaget LM Ericsson)
• Inventors: Whartenby, James, Pehlke, David R.
• Granted Patent: US 6,545,541 B2
• Time in Patent Office: Days
• US Class Current: 330/296
• CPC Class Codes: H03F 1/302 in bipolar transistor amplifiers H03F1/303, H03F1/305, H03F1/307 take precedence
• CPC Class Codes: H03F 2203/21178 Power transistors are made by coupling a plurality of single transistors in parallel

Abstract

Embodiments of the present invention provide methods and systems for current sensing for an amplifier using an embedded cell. The embedded cell is a transistor cell from a plurality of transistor cells which is coupled to the other transistor cells so as to block DC current flow between the embedded cell and the other cells and allow AC current to flow between the embedded cell and the other cells. Power may be supplied to the embedded cell through a current sensing circuit, such as a resistor, which senses the DC current drawn by the embedded cell which reflects to the total DC current drawn by the by amplifier. Systems for bias control and for amplitude modulation utilizing embedded cells are also provided.

Claims

1. An amplifier comprising:

a plurality of transistor cells, each cell having a controlling terminal and controlled terminals, wherein the controlling terminals of the plurality of transistor cells are commonly connected; and

a DC blocking circuit which is configured to AC couple a controlled terminal of at least one of the plurality of transistor cells to a corresponding controlled terminal of at least one of the remainder of the plurality of transistor cells.

2. The amplifier of claim 1, further comprising a DC sensing circuit which is configured to provide a direct current (DC) current to the controlled terminal of the at least one transistor cell.

3. The amplifier of claim 2, wherein the DC sensing circuit is configured to sense a direct current provided to the at least one transistor cell which is proportional to a DC current supplied to the remaining transistor cells in the plurality of transistor cells.

4. The amplifier of claim 2, wherein the DC sensing circuit comprises a resistor having a first terminal coupled to a first reference voltage and a second terminal coupled to the controlled terminal of the at least one transistor cell.

5. The amplifier of claim 4, wherein the DC sensing circuit further comprises:

an inductor having a first terminal coupled to the controlled terminal of the at least one transistor, wherein the DC current is sensed by sensing a voltage between the first terminal of the resistor and the second terminal of the inductor.

6. The amplifier of claim 5, wherein the DC sensing circuit further comprises a capacitor having a first terminal coupled to the second terminal of the inductor and a second terminal coupled to a second reference voltage.

7. The amplifier of claim 5, wherein the inductor has a value sufficiently large so as to not substantially change the DC current supplied to the controlled terminal of the at least one transistor cell of the plurality of transistor cells.

8. The amplifier of claim 5, wherein the inductor has a value of from about 10 to about 100 nH.

9. The amplifier of claim 4, wherein the resistor has a value selected based on an expected DC current range so as to provide a voltage of sufficient magnitude to be sensed by a voltage sensing circuit for the expected DC current range.

10. The amplifier of claim 4, wherein the resistor has a value of from about 10 to about 100 ohms.

11. The amplifier of claim 4, wherein the resistor is integrated with the plurality of transistor cells in a single integrated circuit.

12. The amplifier of claim 2, wherein the DC sensing circuit is a current mirror which mirrors the DC current provided to the controlled terminal of the at least one transistor cell.

13. The amplifier of claim 1, wherein the DC blocking circuit comprises a capacitor having a first terminal coupled to the controlled terminal of the at least one of the plurality of transistor cells and a second terminal coupled to the corresponding controlled terminal of the remaining transistor cells of the plurality of transistor cells.

14. The amplifier of claim 12, wherein the capacitor is selected so as to have an impedance which is substantially less than an overall impedance of the corresponding controlled terminals of the remaining transistor cells in the plurality of transistor cells.

15. The amplifier of claim 2, further comprising a DC bias adjust circuit which controls a DC bias of the amplifier based on the sensed DC current of the DC sensing circuit.

16. The amplifier of claim 1, wherein dimensions of the at least one of the plurality of transistor cells are substantially the same as dimensions of remaining ones of the plurality of transistor cells.

17. The amplifier according to claim 1, wherein a first control voltage threshold associated with the at least one of the plurality of transistor cells is substantially the same as a second control voltage threshold associated with remaining ones of the plurality of transistor cells.

18. The amplifier according to claim 16, wherein dimensions of the at least one of the plurality of transistor cells are different from dimensions of remaining ones of the plurality of transistor cells.

19. The amplifier of claim 1, wherein the plurality of transistor cells comprise a transistor having a first common controlled terminal and a plurality of second controlled terminals and wherein the at least one of the plurality of transistor cells comprises at least one of the second controlled terminals.

20. The amplifier of claim 19, wherein the at least one of the second controlled terminals has substantially the same dimensions as dimensions of remaining ones of the controlled terminals.

21. The amplifier of claim 19, wherein the plurality of transistor cells further comprises a transistor having a common controlling terminal.

22. The amplifier of claim 1, wherein the amplifier comprises an amplifier in a wireless communications device.

23. The amplifier of claim 1, wherein the plurality of transistors comprise bipolar transistors.

24. The amplifier of claim 1, wherein the plurality of transistors comprise a multiple emitter bipolar transistor.

25. The amplifier of claim 1, wherein the plurality of transistors comprise field effect transistors.

26. The amplifier of claim 1, wherein the plurality of transistors comprise a multiple drain field effect transistor.

27. The amplifier of claim 1 in combination with an amplitude modulation circuit utilizing voltage modulation with voltage feedback.

28. The amplifier of claim 27, wherein the amplitude modulation circuit comprises:

an embedded cell voltage sensing circuit configured to sense a voltage provided to the at least one of the plurality of transistor cells and provide a voltage feedback signal;

an embedded cell voltage regulating circuit configured to modulate the voltage to the at least one of the plurality of transistor cells based on an amplitude modulation input signal and the voltage feedback signal; and

a transistor cells voltage regulating circuit configured to modulate a voltage provided to remaining ones of the plurality of transistor cells based on the amplitude modulation input signal and the voltage feedback signal.

29. The amplifier of claim 1 in combination with an amplitude modulation circuit utilizing voltage modulation with sensed current feedback.

30. The amplifier of claim 29, wherein the amplitude modulation circuit to comprises:

an embedded cell current sensing circuit configured to sense a current provided to the at least one of the plurality of transistor cells and provide a current feedback signal;

a voltage regulating circuit configured to modulate a voltage provided to the at least one of the plurality of transistor cells and remaining ones of the plurality of transistor cells based on the amplitude modulation input signal and the current feedback signal.

31. The amplifier of claim 1 in combination with an amplitude modulation circuit utilizing current modulation with current detection and voltage buffering.

32. The amplifier of claim 32, wherein the amplitude modulation circuit to comprises:

an embedded cell current sensing circuit configured to sense a current provided to the at least one of the plurality of transistor cells and provide a current feedback signal;

an embedded cell voltage regulating circuit configured to modulate the voltage to the at least one of the plurality of transistor cells based on an amplitude modulation input signal and the current feedback signal;

a voltage buffer circuit configured to receive the current feedback signal and provide a buffered feedback signal; and

a transistor cells voltage regulating circuit configured to modulate a voltage provided to remaining ones of the plurality of transistor cells based on the buffered feedback signal.

33. The amplifier of claim 1 in combination with an amplitude modulation circuit utilizing current modulation with current detection and a voltage control loop.

34. The amplifier of claim 33, wherein the amplitude modulation circuit to comprises:

an embedded cell current sensing circuit configured to sense a current provided to the at least one of the plurality of transistor cells and provide a current feedback signal;

an embedded cell voltage regulating circuit configured to modulate the voltage to the at least one of the plurality of transistor cells based on an amplitude modulation input signal and the current feedback signal;

a voltage comparator configured to compare a voltage provided to the at least one of the plurality of transistor cells and a voltage provided to remaining ones of the plurality of transistor cells and provide a comparison output; and

a transistor cells voltage regulating circuit configured to provide the voltage to remaining ones of the plurality of transistor cells based on the comparison output.

35. The amplifier of claim 1 in combination with an amplitude modulation circuit utilizing current and voltage modulation.

36. The amplifier of claim 35, wherein the amplitude modulation circuit to comprises:

an embedded cell current sensing circuit configured to sense a current provided to the at least one of the plurality of transistor cells and provide a current feedback signal;

a transistor cells voltage sensing circuit configured to sense a voltage provided to remaining ones of the plurality of transistor cells and provide a voltage feedback signal;

an embedded cell voltage regulating circuit configured to modulate a voltage provided to the at least one of the plurality of transistor cells based on an amplitude modulation input signal and the voltage feedback signal; and

a transistor cells voltage regulating circuit configured to modulate the voltage provided to remaining ones of the plurality of transistor cells based on the amplitude modulated input and the current feedback signal.

37. The amplifier of claim 35, wherein the amplitude modulation circuit to comprises:

an embedded cell voltage sensing circuit configured to sense a voltage provided to the at least one of the plurality of transistor cells and provide a voltage feedback signal;

a transistor cells current sensing circuit configured to sense a current provided to remaining ones of the plurality of transistor cells and provide a current feedback signal;

an embedded cell voltage regulating circuit configured to modulate the voltage provided to the at least one of the plurality of transistor cells based on an amplitude modulation input signal and the current feedback signal; and

a transistor cells voltage regulating circuit configured to modulate a voltage provided to remaining ones of the plurality of transistor cells based on the amplitude modulated input and the voltage feedback signal.

38. The amplifier of claim 1 in combination with an amplitude modulation circuit utilizing current modulation.

39. The amplifier of claim 1 in combination with an amplitude modulation circuit utilizing voltage modulation.

40. A method of sensing a direct current bias in an amplifier having a plurality of transistor cells, comprising:

causing alternating current to flow between the controlled terminal of the at least one of the transistor cells and the controlled terminals of other transistor cells in the plurality of transistor cells while blocking direct current (DC) current flow between the controlled terminal of the at least one of the transistor cells and the controlled terminals of the other transistor cells; and

sensing a direct current supplied to the at least one of the transistor cells.

41. The method of claim 40, wherein the sensing the DC current supplied to the at least one of the transistor cells comprises measuring a voltage value across a resistor in series with a supply voltage provided to the controlled terminal of the at least one of the transistor cells.

42. The method of claim 40, wherein the causing alternating current to flow between the controlled terminal of the at least one of the transistor cells and the controlled terminals of other transistor cells in the plurality of transistor cells while blocking direct current (DC) current flow between the controlled terminal of the at least one of the transistor cells and the controlled terminals of the other transistor cells comprises capacitively coupling the controlled terminal of at least one of the transistor cells to the controlled terminals of the other transistor cells.

43. The method of claim 40, further comprising adjusting a direct current bias of the amplifier based on the sensed DC current supplied to the at least one of the transistor cells.

44. The method of claim 43, wherein the adjusting a direct current bias of the amplifier based on the sensed DC current supplied to the at least one of the transistor cells further comprises determining a total current based on a ratio of a total number of transistor cells in the plurality of transistor cells to a number of transistor cells which are coupled to the controlled terminals of the other transistor cells so as to determine a total direct current supplied to the amplifier.

46. The system of claim 45, wherein the sensing circuit comprises a resistor in series with a supply voltage provided to the controlled terminal of the at least one of the transistor cells.

47. The system of claim 46, wherein the sensing circuit further comprises means for measuring a voltage across the resistor.

48. The system of claim 45, wherein the coupling circuit comprises a capacitive coupling circuit configured to couple the controlled terminal of at least one of the transistor cells to the controlled terminals of the other transistor cells.

49. The system of claim 48, wherein the capacitive coupling circuit comprises a capacitor having a first terminal coupled to the controlled terminal of at least one of the transistor cells and a second terminal coupled to the controlled terminals of the other transistor cells.

50. The system of claim 45, further comprising a bias adjust circuit configured to adjust a direct current bias of the amplifier based on the sensed direct current supplied to the at least one of the transistor cells.

51. The system of claim 50, wherein the bias adjust circuit is further configured to determine a total current based on a ratio of a total number of transistor cells in the plurality of transistor cells to a number of transistor cells which are coupled to the controlled terminals of the other transistor cells so as to determine a total DC current supplied to the amplifier.

45. A system for sensing a direct current bias in an amplifier having a plurality of transistor cells, comprising:

a coupling circuit configured to cause alternating current (AC) current to flow between the controlled terminal of the at least one of the transistor cells and the controlled terminals of the other transistor cells and while blocking direct current (DC) current flow between the controlled terminal of the at least one of the transistor cells and the controlled terminals of the other transistor cells; and

a sensing circuit configured to sense a DC current supplied to the at least one of the transistor cells.

52. A system for sensing a direct current bias in an amplifier having a plurality of transistor cells, comprising:

means for causing alternating current (AC) current to flow between the controlled terminal of the at least one of the transistor cells and the controlled terminals of the other transistor cells and while blocking direct current (DC) current flow between the controlled terminal of the at least one of the transistor cells and the controlled terminals of the other transistor cells; and

means for sensing a DC current supplied to the at least one of the transistor cells.

53. The system of claim 52, wherein the means for sensing comprises a resistor in series with a supply voltage provided to the controlled terminal of the at least one of the transistor cells.

54. The system of claim 53, wherein the means for sensing further comprises means for measuring a voltage across the resistor.

55. The system of claim 52, wherein the means for causing comprises means for capacitively coupling the controlled terminal of at least one of the transistor cells to the controlled terminals of the other transistor cells.

56. The system of claim 55, wherein the means for capacitively coupling comprises a capacitor having a first terminal coupled to the controlled terminal of at least one of the transistor cells and a second terminal coupled to the controlled terminals of the other transistor cells.