Integration type A/D conversion method, integration type A/D converter, and battery charger utilizing such converter
First Claim
1. An integration type A/D converter, comprising:
- an integration circuit for integrating an input signal to generate an integral output voltage;
an integral output voltage reduction circuit for bringing said integral output voltage back to the initial level thereof by a predetermined magnitude per unit time upon receipt of an integral output voltage, reduction signal;
a comparison circuit having at least one comparator for comparing said integral output voltage with a predetermined value to generate a comparative output;
a counter for counting clocks upon receipt of a signal instructing counting clocks (said signal hereinafter referred to as count instruction signal); and
a control circuit for generating, upon receipt of said comparative output, said integral output voltage reduction signal and said count instruction signal.
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Accused Products
Abstract
In the invention, an integrator integrates a current indicative of an input signal to generate at its output end a voltage (referred to as integral output voltage) by means of a condenser. At a point in time when the integral output voltage has reached a predetermined level, or at a point in time determined by timing of a predetermined period, the integral output voltage is reduced in absolute value by flowing into or out of the condenser a constant current supplied by a constant current source. The direction of the constant current depends on the polarity of the output of the integrator. A counter counting up or down clocks stops counting while the constant current is flowing. This permits use of a low-frequency A/D converter to convert the input signal at a reduced power and extend the dynamic range of the A/D converter.
7 Citations
20 Claims
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1. An integration type A/D converter, comprising:
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an integration circuit for integrating an input signal to generate an integral output voltage;
an integral output voltage reduction circuit for bringing said integral output voltage back to the initial level thereof by a predetermined magnitude per unit time upon receipt of an integral output voltage, reduction signal;
a comparison circuit having at least one comparator for comparing said integral output voltage with a predetermined value to generate a comparative output;
a counter for counting clocks upon receipt of a signal instructing counting clocks (said signal hereinafter referred to as count instruction signal); and
a control circuit for generating, upon receipt of said comparative output, said integral output voltage reduction signal and said count instruction signal. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A battery charger having an integration type A/D converter, said A/D converter comprising;
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an integration circuit for integrating an input signal to generate an integral output voltage;
an integral output voltage reduction circuit for bringing said integral output voltage back to the initial level thereof by a predetermined magnitude per unit time upon receipt of an integral output voltage reduction signal;
a comparison circuit having at least one comparator for comparing said integral output voltage with a predetermined value to generate a comparative output;
a counter for counting clocks upon receipt of a count instruction signal; and
a control circuit for generating, upon receipt of said comparative output, said integral output voltage reduction signal and said count instruction signal. - View Dependent Claims (9, 10, 11, 12, 13, 14, 16, 17, 18, 19, 20)
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15. An integration type A/D conversion method, comprising:
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a first step of integrating an input signal to generate an integral output voltage;
a second step of comparing said integral output voltage with a predetermined value to generate a comparative output;
a third step of generating an integral output voltage reduction signal and a count instruction signal upon receipt of said comparative signal;
a fourth step of bringing said integral output voltage back to the initial level thereof by a predetermined magnitude per unit time upon receipt of said integral output voltage reduction signal; and
a fifth step of counting clocks upon receipt of said count instruction signal to output the counts of clocks counted.
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Specification