Computer system, particularly for simulation of human perception via sense organs

• US 20030024518A1
• Filed: 07/05/2001
• Published: 02/06/2003
• Est. Priority Date: 05/02/2000
• Status: Active Grant

• Current Assignee: Bernard Mitterauer
• Original Assignee: Bernard Mitterauer
• Inventors: Mitterauer, Bernard
• Granted Patent: US 6,697,789 B2
• Time in Patent Office: Days
• US Class Current: 124/50
• CPC Class Codes: G06N 3/02 Neural networks

Abstract

The computer system includes a receptor field (2) with sensors (R_i) each of which receives data with specific characteristic (A, B, C). These data are passed to processors (P_i, P_i/k), whereby only those connections (L_i) between sensors and processors are released that are suited to an evaluation of the data according to a combination of specific data dictated by a phase program of a phase program circuit (7). The computer system also includes a selector circuit (71) that discards those program commands from dictated program commands (73) that lead to a “senseless” computation result. A motor program circuit (8) for the control of effectors (9) may be connected to the computer system that at least contribute to the movement of the receptor field (2) in order to bring the receptor field closer to suitable data with specific characteristics in order to enable better execution of the program.

Claims

1. Computer system used to determine and evaluate data or groups of data that each possess a specific property (A, B, C), particularly used to simulate human perception via sense organs, characterized by

a receptor field (2) with sensors (R_i), that each correspond to data of a specific property (a, b, c) and then issue a output signal characterizing that property;

a processor field with processors (P_i, P_i/k), that are each assigned to a sensor (R_i) via lines (L_i) containing output signals from the sensors (R_i);

a switching field (5) to switch on or off individual connections (Li) between the sensors (R_i) and the processors (P_i, P_i/k);

a phase circuit (6) that activates and deactivates the switching field (5) and the processors (P_i, P_i/k) in cycled time phases;

a phase program circuit (7) that communicates with a phase circuit (6) and determines the progression of the cycled time phases and the associated control of the processors (P_i, P_i/k) and the switching field (5) via the phase circuit (6), whereby the anticipated data dictated by the phase program circuit (7³) and its possible distribution to the sensors (R_i) are compared with the data actually present there, and the program is preserved or altered based on this comparison.

2. Computer system as in claim 1, characterized in that a processor group (PG_i) containing several processors (P_i, P_i/k) each is assigned to each sensor (R_i).

3. Computer system as in claim 1, characterized in that switches (S_i) are positioned in the lines (L_i) between the sensors (R_i) and the processor (P_i) that are controlled by the switching field (5) and either block or connect the assigned line based on the analysis program present.

4. Computer system as in claim 1, characterized in that additional switches (SW_i) are positioned in the lines between the sensors (R_i) and the processors (P_i, P_i/k) that are controlled by the phase circuit (6) based on the program dictated by the phase program circuit (7), and either block or connect the assigned line (L_i).

5. Computer system as in claim 1, characterized in that a motor program circuit (8) is connected with the phase program circuit (7) that causes effectors (9) to at least move the receptor field (2).

6. Computer system as in claim 5, characterized in that the motor program circuit (8) is connected with the outputs of the processors (P_i) or of the processor groups (PG_i).

7. Computer system as in claim 5, characterized in that the switching field (5) is connected with a circuit used to control the effectors (9).

8. Computer system as in claim 1, characterized in that the phase program circuit (7) includes a selection circuit (71) that continuously checks the dictated program commands as to whether their implementation is meaningful for the current computer system status or not, and that removes those program commands that lead to a senseless action.

9. Computer system as in claim 8, characterized in that the selection circuit (71) includes a dictating memory buffer (72) in which at least the program commands to be removed from the program command sequence are stored, and that a comparator (74) is provided that compares the command programs delivered by the phase program circuit (7) with the program commands stored in the dictating memory buffer (72).

10. Computer system as in claim 8, characterized in that the dictating memory buffer (72) is connected with a result comparator (10) computer system that examines the result of the processed program commands for effectiveness and writes to the dictating memory buffer (72) those program commands that have led to an unsuitable result.

11. Computer system as in claim 1, characterized in that the comparator (74) is controlled by a task assignment control (75) from which task assignments are sent to the comparator in the form of program commands.