Data communication system, controller device and data communication method

• US 20030039313A1
• Filed: 08/20/2002
• Published: 02/27/2003
• Est. Priority Date: 08/24/2001
• Status: Active Grant

• Current Assignee: Collabo Innovations, Inc. (Wi-LAN Inc.)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Inoue, Atsuo, Nakashima, Shota
• Granted Patent: US 7,113,547 B2
• Time in Patent Office: Days
• US Class Current: 375/259
• CPC Class Codes: H04L 25/45 using electronic distributors

Abstract

In a controller device, when a first transmitting signal is at a “L” level, a first operation voltage is high and the amplitude of signals CK and ICK is large, and on the contrary, the amplitude is small when the first transmitting signal is at a “H” level. In a data carrier device, the signals CK and ICK are subjected to full-wave rectification by a rectifier circuit so as to generate a second operation voltage, and a first receiving signal is extracted from the second operation voltage by a first signal detection circuit. On the other hand, in the data carrier device, when a second transmitting signal is at a “L” level, impedance between two contacts is small and the amplitude of the signals CK and ICK is small, and on the contrary, the amplitude is large when the second transmitting signal is at a “H” level. In the controller device, change of the amplitude of the signal ICK is extracted as a second receiving signal by a second signal detection circuit. Accordingly, supply of power and clock and two-way serial data communication can be simultaneously executed between the controller device and the data carrier device through merely two contacts.

Claims

1. A data communication system comprising:

a controller device; and

a data carrier device connectable to said controller device through first and second contacts for performing data transfer between said controller device and said data carrier device,

wherein said controller device includes;

a power supply line for supplying power;

a clock generation circuit for generating a clock pulse signal and supplying said clock pulse signal to at least one of said first and second contacts;

a voltage level generation circuit for converting a voltage from said power supply line and supplying said converted voltage to said clock generation circuit as a first operation voltage; and

a first transmitter circuit for changing said first operation voltage generated by said voltage level generation circuit in accordance with a first transmitting signal, and

said data carrier device includes;

a rectifier circuit for rectifying a voltage between said first and second contacts and supplying said rectified voltage to said data carrier device as a second operation voltage;

a first signal detection circuit for detecting, as a first receiving signal, change of said second operation voltage having been rectified by said rectifier circuit; and

a clock detection circuit for generating an operation clock on the basis of said clock pulse signal supplied to at least one of said first and second contacts.

2. The data communication system of claim 1,

wherein said voltage level generation circuit includes a plurality of resistors serially disposed between said power supply line and ground, and supplies said first operation voltage from an end of one of said plurality of resistors, and

said first transmitter circuit includes a switching element that is connected in parallel to at least one of said plurality of resistors and is turned on/off in accordance with said first transmitting signal.

3. The data communication system of claim 1,

wherein said voltage level generation circuit includes a plurality of resistors serially disposed between said power supply line and ground, and supplies said first operation voltage from an end of one of said plurality of resistors, and

said first transmitter circuit includes a switching element that is connected in series to at least one of said plurality of resistors and is turned on/off in accordance with said first transmitting signal.

9. The data communication system of any of claim 1,

wherein said controller device further includes a second signal detection circuit for detecting, as a second receiving signal, change of voltage amplitude on one of said first and second contacts, and

said data carrier device further includes a second transmitter circuit for changing impedance between said first and second contacts in accordance with a second transmitting signal.

12. The data communication system of claim 1,

wherein said controller device further includes a second signal detection circuit for detecting, as a second receiving signal, change of voltage amplitude on a terminal for outputting said first operation voltage of said voltage level generation circuit, and

said data carrier device further includes a second transmitter circuit for changing impedance between said first and second contacts in accordance with a second transmitting signal.

14. The data communication system of any of claim 1,

wherein said controller device supplies, to said first contact, said clock pulse signal generated by said clock generation circuit and supplies, to said second contact, an inverted clock pulse signal in a phase reverse to that of said clock pulse signal generated by said clock generation circuit, and

said rectifier circuit performs full-wave rectification on said voltage between said first and second contacts.

17. The data communication system of any of claim 1,

wherein said controller device supplies said clock pulse signal generated by said clock generation circuit to said first contact and supplies ground potential to said second contact, and

said rectifier circuit performs half-wave rectification on said voltage between said first and second contacts.

20. The data communication system of claim 1,

wherein said voltage level generation circuit and said clock generation circuit are serially connected to each other in said controller device.

21. The data communication system of claim 1,

wherein said clock generation circuit generates said clock pulse signal and an inverted clock pulse signal in a phase reverse to that of said clock pulse signal and supplies said clock pulse signal and said inverted clock pulse signal to said first and second contacts, respectively, and

said first transmitter circuit changes said first operation voltage in accordance with said first transmitting signal in such a manner that a rise edge of said first operation voltage supplied to said clock generation circuit is generated in a stable period shifted from edges of said clock pulse signal and said inverted clock pulse signal.

22. The data communication system of claim 21,

wherein said first transmitter circuit changes said first operation voltage in accordance with said first transmitting signal in such a manner that voltage changes corresponding to a rise edge and a glitch edge of said first operation voltage appear in one of said clock pulse signal and said inverted clock pulse signal.

23. The data communication system of claim 21,

wherein said first transmitter circuit changes said first operation voltage in accordance with said first transmitting signal in such a manner that a voltage change corresponding to a rise edge of said first operation voltage appears in one of said clock pulse signal and said inverted clock pulse signal and that a voltage change corresponding to a glitch edge of said first operation voltage appears in the other of said clock pulse signal and said inverted clock pulse signal.

24. The data communication system of claim 21,

wherein said first transmitter circuit changes said first operation voltage in accordance with said first transmitting signal with causing a difference between a period when said first operation voltage has potential corresponding to a logical “

H”

level and a period when said first operation voltage has potential corresponding to a logical “

L”

level.

25. The data communication system of any of claim 1,

wherein said first signal detection circuit includes a high-pass filter for receiving a voltage in which a change is to be detected and detecting an edge of said voltage.

28. The data communication system of claim 25,

wherein said first signal detection circuit includes:

a low-pass filter for removing noise from said voltage;

a comparator for comparing a level of a signal having passed through said high-pass filter with a given level; and

a flip-flop for receiving a comparison result of said comparator and detecting, as said first receiving signal, a signal in synchronization with said operation clock generated by said clock detection circuit, and

said high-pass filter receives a signal having passed through said low-pass filter.

4. A data communication system comprising:

a controller device; and

a data carrier device connectable to said controller device through first and second contacts for performing data transfer between said controller device and said data carrier device,

wherein said controller device includes;

a power supply line for supplying power;

a voltage level generation circuit for converting a voltage from said power supply line and supplying said converted voltage as a signal voltage between said first and second contacts; and

a first transmitter circuit for changing said signal voltage generated by said voltage level generation circuit in accordance with a first transmitting signal, and said data carrier device includes;

a regulator for stabilizing a voltage between said first and second contacts and supplying said stabilized voltage as an operation voltage of said data carrier device; and

a first signal detection circuit for detecting, as a first receiving signal, change of said voltage between said first and second contacts.

5. The data communication system of claim 4,

wherein said controller device further includes a second signal detection circuit for detecting, as a second receiving signal, change of said voltage between said first and second contacts, and

said data carrier device further includes a second transmitter circuit for changing impedance between said first and second contacts in accordance with a second transmitting signal.

6. The data communication system of claim 4,

wherein said voltage level generation circuit includes a plurality of resistors serially disposed between said power supply line and ground, and supplies said signal voltage from an end of one of said plurality of resistors, and

said first transmitter circuit includes a switching element that is connected in parallel to at least one of said plurality of resistors and is turned on/off in accordance with said first transmitting signal.

26. The data communication system of any of claim 4,

wherein said first signal detection circuit includes a high-pass filter for receiving a voltage in which a change is to be detected and detecting an edge of said voltage.

29. The data communication system of claim 26,

wherein said first signal detection circuit includes:

a low-pass filter for removing noise from said voltage;

a comparator for comparing a level of a signal having passed through said high-pass filter with a given level; and

a flip-flop for receiving a comparison result of said comparator and detecting, as said first receiving signal, a signal in synchronization with said operation clock generated by said clock detection circuit, and

said high-pass filter receives a signal having passed through said low-pass filter.

7. A data communication system comprising:

a controller device; and

a data carrier device connectable to said controller device through first and second contacts for performing data transfer between said controller device and said data carrier device,

wherein said controller device includes;

a power supply line for supplying power;

a clock generation circuit for generating a clock pulse signal and supplying said clock pulse signal to at least one of said first and second contacts;

a voltage level generation circuit for converting a voltage from said power supply line and supplying, as a first operation voltage, said converted voltage to said clock generation circuit; and

a pulse width modulation circuit for changing, in accordance with a first transmitting signal, a pulse width of said clock pulse signal generated by said clock generation circuit, and

said data carrier device includes;

a rectifier circuit for rectifying a voltage between said first and second contacts and supplying said rectified voltage to said data carrier device as a second operation voltage;

a first signal detection circuit for detecting, as a first receiving signal, change of said pulse width of said clock pulse signal on either of the first and second contacts; and

a clock detection circuit for generating an operation clock on the basis of said clock pulse signal supplied to at least one of said first and second contacts.

10. The data communication system of any of claim 7,

wherein said controller device further includes a second signal detection circuit for detecting, as a second receiving signal, change of voltage amplitude on one of said first and second contacts, and

said data carrier device further includes a second transmitter circuit for changing impedance between said first and second contacts in accordance with a second transmitting signal.

13. The data communication system of claim 7,

wherein said controller device further includes a second signal detection circuit for detecting, as a second receiving signal, change of voltage amplitude on a terminal for outputting said first operation voltage of said voltage level generation circuit, and

said data carrier device further includes a second transmitter circuit for changing impedance between said first and second contacts in accordance with a second transmitting signal.

15. The data communication system of any of claim 7,

wherein said controller device supplies, to said first contact, said clock pulse signal generated by said clock generation circuit and supplies, to said second contact, an inverted clock pulse signal in a phase reverse to that of said clock pulse signal generated by said clock generation circuit, and

said rectifier circuit performs full-wave rectification on said voltage between said first and second contacts.

18. The data communication system of any of claim 7,

wherein said controller device supplies said clock pulse signal generated by said clock generation circuit to said first contact and supplies ground potential to said second contact, and

said rectifier circuit performs half-wave rectification on said voltage between said first and second contacts.

8. A data communication system comprising:

a controller device; and

a data carrier device connectable to said controller device through first and second contacts for performing data transfer between said controller device and said data carrier device,

wherein said controller device includes;

a power supply line for supplying power;

a clock generation circuit for receiving a first operation voltage from said power supply line, generating a clock pulse signal and supplying said clock pulse signal to at least one of said first and second contacts; and

a first transmitter circuit for changing, in accordance with a first transmitting signal, one of a higher voltage level and a lower voltage level of said clock pulse signal generated by said clock generation circuit, and

said data carrier device includes;

a rectifier circuit for rectifying a voltage between said first and second contacts and supplying said rectified voltage to said data carrier device as a second operation voltage;

a first signal detection circuit for detecting, as a first receiving signal, change of said second operation voltage having been rectified by said rectifier circuit; and

a clock detection circuit for generating an operation clock on the basis of said clock pulse signal supplied to at least one of said first and second contacts.

11. The data communication system of any of claim 8,

wherein said controller device further includes a second signal detection circuit for detecting, as a second receiving signal, change of voltage amplitude on one of said first and second contacts, and

said data carrier device further includes a second transmitter circuit for changing impedance between said first and second contacts in accordance with a second transmitting signal.

16. The data communication system of any of claim 8,

wherein said controller device supplies, to said first contact, said clock pulse signal generated by said clock generation circuit and supplies, to said second contact, an inverted clock pulse signal in a phase reverse to that of said clock pulse signal generated by said clock generation circuit, and

said rectifier circuit performs full-wave rectification on said voltage between said first and second contacts.

19. The data communication system of any of claim 8,

wherein said controller device supplies said clock pulse signal generated by said clock generation circuit to said first contact and supplies ground potential to said second contact, and

said rectifier circuit performs half-wave rectification on said voltage between said first and second contacts.

27. The data communication system of any of claim 8,

wherein said first signal detection circuit includes a high-pass filter for receiving a voltage in which a change is to be detected and detecting an edge of said voltage.

30. The data communication system of claim 27,

wherein said first signal detection circuit includes:

a low-pass filter for removing noise from said voltage;

a comparator for comparing a level of a signal having passed through said high-pass filter with a given level; and

a flip-flop for receiving a comparison result of said comparator and detecting, as said first receiving signal, a signal in synchronization with said operation clock generated by said clock detection circuit, and

said high-pass filter receives a signal having passed through said low-pass filter.

31. A controller device for performing data transfer to and from a data carrier device through first and second contacts, comprising:

a power supply line for supplying power;

a clock generation circuit for generating a clock pulse signal and an inverted clock pulse signal in a phase reverse to that of said clock pulse signal, and supplying said clock pulse signal and said inverted clock pulse signal to said first and second contacts, respectively;

a voltage level generation circuit for converting a voltage from said power supply line and supplying, as an operation voltage, said converted voltage to said clock generation circuit; and

a transmitter circuit for changing said operation voltage generated by said voltage level generation circuit in accordance with a transmitting signal,

wherein said operation voltage is generated in such a manner that a rise edge of said operation voltage is generated in a stable period shifted from edges of said clock pulse signal and said inverted clock pulse signal.

32. A data communication method for performing data transfer between a controller device and a data carrier device through first and second contacts, comprising the steps of:

generating a clock pulse signal in said controller device;

changing a voltage level of said clock pulse signal in accordance with a first transmitting signal and supplying said clock pulse signal to at least one of said first and second contacts in said controller device;

rectifying a voltage between said first and second contacts and supplying said rectified voltage to said data carrier device as a second operation voltage in said data carrier device;

detecting change of said second operation voltage as a first receiving signal in said data carrier device;

generating an operation clock on the basis of said clock pulse signal supplied to at least one of said first and second contacts in said data carrier device;

detecting, as a second receiving signal, change of voltage amplitude on one of said first and second contacts in said controller device; and

changing impedance between said first and second contacts in accordance with a second transmitting signal in said data carrier device.

33. A data communication method for performing data transfer between a controller device and a data carrier device through first and second contacts, comprising the steps of:

generating a first operation voltage by changing a voltage from a power supply line in accordance with a transmitting signal in said controller device;

generating a clock pulse signal and an inverted clock pulse signal in a phase reverse to that of said clock pulse signal by using said first operation voltage as an operation voltage in said controller device;

supplying said clock pulse signal and said inverted clock pulse signal to said first and second contacts, respectively in said controller device;

generating a second operation voltage as an operation voltage of said data carrier device by rectifying a voltage between said first and second contacts in said data carrier device; and

detecting change of said second operation voltage as a receiving signal in said data carrier device,

wherein said first operation voltage is generated in such a manner that a rise edge of said first operation voltage is generated in a stable period shifted from edges of said clock pulse signal and said inverted clock pulse signal.

34. The data communication method of claim 33,

wherein said first operation voltage is generated by changing said first operation voltage in accordance with said transmitting signal in such a manner that a voltage change corresponding to a rise edge of said first operation voltage appears in one of said clock pulse signal and said inverted clock pulse signal and that a voltage change corresponding to a glitch edge of said first operation voltage appears in the other of said clock pulse signal and said inverted clock pulse signal.