×

Intellegent transmitter receiver system and its operation method

  • US 20030078685A1
  • Filed: 10/19/2001
  • Published: 04/24/2003
  • Est. Priority Date: 10/19/2001
  • Status: Abandoned Application
First Claim
Patent Images

1. An intelligent transmitter receiver system comprising:

  • a CPU (central processing unit) adapted to control instructions for the actions of code-transmitting mode and copy-learning mode;

    a data-entry keys input circuit adapted to input signal into said CPU;

    a DC battery circuit adapted to provide the necessary working power supply;

    a DC voltage rectifier circuit adapted to electrically connect a DC battery circuit and convert the output power of the DC battery circuit into the necessary working voltage;

    a memory adapted to store code data obtained by said CPU and the center frequency value of said digital-to-analog converter;

    an indicator lamp circuit adapted to indicate current operation mode subject to the instruction of said CPU by maintaining indicator lamp means thereof constantly on when at the code-transmitting mode, or flashing said indicator lamp means when at the copy-learning mode;

    a digital-to-analog converter adapted to convert digital (parallel) signal into analog signal subject to the instruction of said CPU, so as to further drive a voltage-control type high-frequency transmitting circuit to change output oscillation frequency;

    a voltage-controlled type high frequency transmitting circuit adapted to transmit an oscillation frequency subject to the control of said CPU and said digital-to-analog converter;

    a bandwidth extension switching circuit adapted to extend the bandwidth of said voltage-controlled type high frequency transmitting circuit;

    a mixer circuit adapted to mix the wave from said internal high-frequency transmitting circuit with the wave from an external remote controller, enabling the signal to be outputted only when wave mixing achieved;

    a signal amplifier adapted to amplify signal from said mixer circuit and signal from a full-channel receiving circuit into a digital serial signal receivable to said CPU; and

    a full-channel signal receiving circuit adapted to receive external series signal and to output received series signal to said CPU for rapid center frequency correction.

View all claims
  • 0 Assignments
Timeline View
Assignment View
    ×
    ×