Communication controller for an active transponder

• US 20030112125A1
• Filed: 08/01/2002
• Published: 06/19/2003
• Est. Priority Date: 02/08/2000
• Status: Abandoned Application

• Current Assignee: O-Free ASA
• Original Assignee: O-Free ASA
• Inventors: Saegrov, Atle
• Application Number:
  US10/169,764
• Publication Number:
  US 20030112125A1
• Time in Patent Office: Days
• US Class Current: 340/10.1
• CPC Class Codes: G06K 19/0701 at least one of the integrated circuit chips comprising an arrangement for power management
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 7/0008 General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer
• CPC Class Codes: G07B 15/063 using wireless information transmission between the vehicle and a fixed station identification of vehicles G08G

Abstract

Method and communications controller for processing of encoded information by a battery-powered active transponder. It is particularly provided for the application within a transponder system for the wireless payment of road toll, whereby the transponder over an antenna receives modulated microwave radiation of preset frequency for obtaining an input signal which is demodulated for obtaining a binary input data sequence. This is then fed to a digital processor (microcontroller) operated by a processing clock of preset clock frequency, for decoding and generating of a binary output data sequence, from which within a certain duration as an answer to the received input signal an output signal is formed, which is transmitted over the antenna of the transponder. For reducing the load of the battery of the transponder by the pulse-like occuring current demand of the processor with at the same time a relative short duration between the receiving of the input signal and the irradiating of the output signal, the data of the decoded input data sequence are parallel processed by the processor (17) with a relative low clock frequency. A plurality of processor modules (19-22) of the processor (17) which are integrated to a processing unit realizing the parallel occuring processing of data of the decoded input data sequence and are operated by a timing generator (symbol clock retrieving circuit 18) with a relative low clock frequency of the processing clock rate.

Claims

1. Method for processing of encoded information by a battery-powered active transponder, which particularly is provided for the application within a transponder system for the wireless payment of road toll, whereby the transponder over an antenna receives modulated microwave radiation of preset frequency for obtaining an input signal which is demodulated for obtaining a binary input data sequence, which then is fed to a digital processor (microcontroller) operated by a processing clock of preset clock frequency for decoding and generating of a binary output data sequence, from which within a certain duration as an answer to the received input signal an output signal is formed, which is transmitted over the antenna of the transponder, characterized in that for reducing the load of the battery of the transponder by the pulse-like occuring current demand of the processor with at the same time a relative short duration between the receiving of the input signal and the irradiating of the output signal data, the decoded input data sequence are processed by the processor parallel and with a relative low clock frequency.

2. Method according to claim 1, characterized in that the parallel occuring processing of data of the decoded input data sequence is realized with a much lower clock frequency, preferably only a fraction of that clock frequency, compared to a clock frequency of about 10 MHz and higher with a serial occuring processing according to the state-of-the-art.

3. Method according to claim 1 or 2, characterized in that the parallel occuring processing of data of the decoded input data sequence is realized with a clock frequency which is derived from the clock of the symbol timing generator by retrieving of a plurality of succeeding timing pulses of the symbol clock from the input data sequence and which preferably corresponds to the clock frequency of the symbol clock.

4. Method according to claim 3, characterized in that for forming of a clock frequency either derived from the clock frequency of the symbol clock or corresponding to this clock frequency an electronic PLL-circuit (phase locked loop) is applied.

5. Method according to claim 1, characterized in that the parallel occuring processing of data of the decoded input data sequence is realized bit-by-bit.

6. Communications controller (17) for a battery-powered active transponder, which particularly is provided for the application within a transponder system for the wireless payment of road toll, whereby the transponder over an antenna receives modulated microwave radiation of preset frequency for obtaining an input signal which is demodulated for obtaining a binary input data sequence, which then is fed to a digital processor (17) (microcontroller) operated by a processing clock of preset clock frequency for decoding and generating of a binary output data sequence, from which within a certain duration as an answer to the received input signal an output signal is formed, which is transmitted over the antenna of the transponder, characterized by a plurality of processor modules (19-22) of the processor (17) which are integrated to a processing unit realizing the parallel occuring processing of data of the decoded input data sequence and are operated by a timing generator (symbol clock retrieving circuit 18) with a relative low clock frequency of the processing clock rate.

7. Communications controller (17) according to claim 6, characterized in that as timing generator for generating a processing clock rate for the mentioned processor modules (19-22) an electronic circuit is provided for retrieving the clock frequency of the symbol clock from the input signal.

8. Communications controller (17) according to claim 7, characterized in that for generating of a processing clock rate for the mentioned processor modules (19-22) with a clock frequency derived from the clock frequency of the symbol clock, preferably corresponding to the symbol clock, a PLL-circuit (phase locked loop) is applied.

9. Communications controller (17) according to claim 6, characterized in that the processor modules (19-22) are dimensioned for a bit-by-bit processing of data of the decoded input data sequence.