Tail current node equalization for a variable offset amplifier
First Claim
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1. An amplifier circuit comprising:
- first and second differential pairs;
first and second variable current generators coupled to respective tail current nodes of the first and second differential pairs, to control respective tail currents of the first and second differential pairs; and
a switch circuit coupled to equalize the voltages of the respective tail current nodes.
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Abstract
First and second differential transistor pairs, where each may be intentionally unbalanced or balanced, are provided. First and second variable current generators are coupled to control respective tail currents of the first and second differential pairs. A switch circuit is coupled to equalize the voltages of the respective tail current nodes. Applications of the amplifier circuit include sense amplifiers and comparators.
7 Citations
30 Claims
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1. An amplifier circuit comprising:
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first and second differential pairs;
first and second variable current generators coupled to respective tail current nodes of the first and second differential pairs, to control respective tail currents of the first and second differential pairs; and
a switch circuit coupled to equalize the voltages of the respective tail current nodes. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A circuit comprising:
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means for driving the voltages of first and second output nodes in opposite directions, in accordance with an input voltage difference, the driving means having an offset that is a function of first and second currents through respective first and second bias nodes of the driving means;
means for changing the first and second currents in accordance with a control input; and
means for reducing changes in the first and second currents, said changes being caused by noise injected into the first and second bias nodes. - View Dependent Claims (9, 10, 11)
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12. A circuit comprising:
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first and second pairs of source coupled transistors, the transistors of each pair being intentionally mismatched and connected to drive first and second output nodes;
a first variable current generator coupled to provide a current being one of (1) directed into, and (2) directed out of, a common source node of the first pair of transistors;
a second variable current generator coupled to provide a current being one of (1) directed into, and (2) directed out of, a common source node of the second pair of transistors; and
a switch circuit coupled to equalize the voltages of the common source nodes. - View Dependent Claims (13, 14, 15, 16, 17, 18)
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19. A method for sensing a differential signal, comprising:
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equalizing voltages of tail current nodes of first and second differential pairs, that are coupled to drive first and second output nodes with a regenerative circuit; and
thenreleasing the tail current nodes of the first and second differential pairs, while a differential signal is being applied to first and second input nodes of the first and second differential pairs; and
thenevaluating the first and second output nodes. - View Dependent Claims (20, 21, 22, 23, 25, 26, 27)
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24. An article of manufacture comprising:
a machine-readable medium having data that when accessed by a processor supports a representation of a circuit that includes a pair of differential amplifiers, a pair of variable current generators whose outputs are respective tail current nodes of the pair of differential amplifiers, and a switch circuit coupled to equalize the voltages of the tail current nodes.
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28. A system comprising:
first and second integrated circuit dies coupled to communicate with each other via a data communications bus, the bus being designed to carry a differential signal between the first and second dies, the first die having a bus interface in which an on-chip variable offset comparator has a pair of input nodes coupled to receive the differential signal, the comparator having a pair of differential amplifiers that have the input nodes, a pair of variable current generators whose outputs are respective tail current nodes of the pair of mismatched differential amplifiers, and a switch circuit coupled to equalize the voltages of the tail current nodes. - View Dependent Claims (29, 30)
Specification