Semiconductor storage device

• US 20030149832A1
• Filed: 03/14/2003
• Published: 08/07/2003
• Est. Priority Date: 06/22/1992
• Status: Active Grant

• Current Assignee: Emergence Memory Solutions LLC
• Original Assignee: Renesas Technology Corporation (Renesas Electronics Corporation)
• Inventors: Katayama, Kunihiro, Kaki, Kenichi, Tsunehiro, Takashi
• Granted Patent: US 6,728,826 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0611 in relation to response time
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/0652 Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays
• CPC Class Codes: G11C 16/102 External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
• CPC Class Codes: G11C 16/32 Timing circuits

Abstract

A semiconductor disk pack comprising a plurality of flash memories which operate slower in writing data thereinto than in reading data therefrom, a write buffer memory in which data are temporarily held, a processor which controls the data writing operation and which transfers and analyzes commands and statuses, an address controller which generates physical addresses, a circuit which generates a writing supply voltage Vpp for the flash memories, a memory address bus, and a data bus. The semiconductor disk pack is connected to a standard bus in a personal computer or the like. The processor writes the data of one word into a desired one of the flash memories, and it continuously writes the data of one word into an accessible one of the other flash memories during a latency which extends until the desired flash memory becomes capable of writing the next data of one word thereinto.

Claims

1. A semiconductor storage device, comprising:

a plurality of flash memories which store data therein; and

control means for sending a first instruction of writing the data to one of said flash memories, and for sending a second write instruction to another of said flash memories different from the flash memory to which the first write instruction has been sent and which is undergoing a write operation, before said flash memory becomes capable of accepting a next write instruction.