Twin p-well CMOS imager

• US 20030169360A1
• Filed: 04/04/2003
• Published: 09/11/2003
• Est. Priority Date: 12/08/1998
• Status: Active Grant

• Current Assignee: Round Rock Research LLC
• Original Assignee: Howard F. Rhodes
• Inventors: Rhodes, Howard F.
• Granted Patent: US 7,538,372 B2
• Time in Patent Office: Days
• US Class Current: 348/308
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70

Abstract

A CMOS imager which includes a substrate voltage pump to bias a doped area of a substrate to prevent leakage into the substrate from the transistors formed in the doped area. The invention also provides a CMOS imager where a photodetector sensor array is formed in a first p-well and readout logic is formed in a second p-well. The first p-well can be selectively doped to optimize cross-talk, collection efficiency and transistor leakage, thereby improving the quantum efficiency of the sensor array while the second p-well can be selectively doped and/or biased to improve the speed and drive of the readout circuitry.

Claims

1. An imaging device comprising:

a photosensitive area within a substrate for accumulating photo-generated charge in said area;

a readout circuit comprising at least an output transistor formed in said substrate; and

a substrate voltage pump coupled to a supply voltage and connected to supply said substrate with a voltage.

2. The imaging device according to claim 1, wherein the accumulation of charge in said photosensitive area is controlled by a photogate.

3. The imaging device according to claim 1, wherein said photosensitive area is a photodiode.

4. The imaging device according to claim 1, wherein said photosensitive area is controlled by a photoconductor.

5. The imaging device according to claim 1, further comprising a controllable charge transfer region having a control terminal, said transfer region being formed in said substrate adjacent said photosensitive area and having a node connected to a gate of said output transistor and at least one controllable charge transfer device for transferring charge from said photosensitive area to said node in accordance with a control signal applied to said control terminal.

6. The imaging device according to claim 5, wherein said charge transfer region is controlled by a field effect transistor.

7. The imaging device according to claim 1, wherein said substrate voltage pump provides a negative voltage to said substrate.

8. The imaging device according to claim 7, wherein said substrate voltage pump provides a voltage of from about −

0.25 volts to about −

2.5 volts to said substrate.

9. The imaging device according to claim 7, wherein said substrate voltage pump provides a voltage of from about −

0.70 volts to about −

1.50 volts to said substrate.

10. The imaging device according to claim 7, wherein said substrate voltage pump provides a voltage of about −

1.1 volts to said substrate.

11. The imaging device according to claim 1, wherein said substrate voltage pump provides a positive charge to said substrate.

12. The imaging device according to claim 11, wherein said substrate voltage pump provides a voltage of from about 0.25 volts to about 2.5 volts to said substrate.

13. The imaging device according to claim 11, wherein said substrate voltage pump provides a voltage of from about 0.7 volts to about 1.50 volts to said substrate.

14. The imaging device according to claim 11, wherein said substrate voltage pump provides a voltage of about 1.1 volts to said substrate.

15. An imaging device comprising:

a photosensitive device overlying a substrate for causing accumulation of the photo-generated charge in an underlying portion of said substrate;

a readout circuit comprising at least an output transistor formed in said substrate;

a reset transistor for resetting said node to a predetermined voltage;

a row select transistor; and

at least one substrate voltage pump coupled to a supply voltage and connected to supply said substrate with a voltage.

16. The imaging device according to claim 15, wherein said photosensitive device is a photogate.

17. The imaging device according to claim 15, wherein said photosensitive device is a photodiode.

18. The imaging device according to claim 15, wherein said photosensitive device is a photoconductor.

19. The imaging device according to claim 15, further comprising a controllable charge transfer region having a control terminal, said transfer region being formed in said substrate adjacent said photosensitive area and having a node connected to a gate of said output transistor and at least one charge transfer device for transferring charge from said photosensitive area to said node in accordance with a continual control signal applied to said control terminal.

20. The imaging device according to claim 19, wherein said charge transfer device is a field effect transistor.

21. The imaging device according to claim 15, wherein said wherein said substrate voltage pump provides a negative voltage to said substrate.

22. The imaging device according to claim 21, wherein said substrate voltage pump provides a voltage of from about −

0.25 volts to about −

2.5 volts to said substrate.

23. The imaging device according to claim 21, wherein said substrate voltage pump provides a voltage of from about −

0.7 volts to about −

1.5 volts to said substrate.

24. The imaging device according to claim 21, wherein said substrate voltage pump provides a voltage of about −

1.1 volts to said substrate.

25. The imaging device according to claim 15, wherein said substrate voltage pump provides a positive voltage to said substrate.

26. The imaging device according to claim 25, wherein said substrate voltage pump provides a voltage of from about 0.25 volts to about 2.5 volts to said substrate.

27. The imaging device according to claim 25, wherein said substrate voltage pump provides a voltage of from about 0.70 volts to about 1.50 volts to said substrate.

28. The imaging device according to claim 25, wherein said substrate voltage pump provides a voltage of about 1.1 volts to said substrate.

29. An imaging system for generating an output signal based on an image focused on the imaging system, the imaging system comprising:

a plurality of pixel sensors arranged into an array of rows and columns, each pixel sensor being operable to generate a voltage at a diffusion node in a substrate corresponding to detected light intensity by the sensor;

at least one substrate voltage pump coupled to a supply voltage and connected to supply said substrate with a voltage;

a row select device to effectively operate said pixel sensors;

a row decoder having a plurality of control lines connected to the sensor array, each control line being connected to the pixel sensors in a respective row, wherein the row decoder is operable to activate the pixel sensors in a row by said row select device; and

a plurality of output circuits, each output circuit being connected to the respective pixel sensors in a column, each output circuit being operable to is store voltage signals received from a respective pixel sensor and to provide a pixel sensor output signal.

30. The imaging system according to claim 29, wherein said pixel sensors comprise a photogate.

31. The imaging system according to claim 29, wherein said pixel sensors comprise a photodiode.

32. The imaging system according to claim 29, wherein said pixel sensors comprise a photoconductor.

33. The imaging system according to claim 29, wherein said diffusion node is a floating diffusion node.

34. The imaging system according to claim 29, wherein said substrate voltage pump provides a negative voltage to said substrate.

35. The system according to claim 34, wherein said substrate voltage pump provides a voltage of from about −

0.25 volts to about −

2.5 volts to said substrate.

36. The imaging system according to claim 34, wherein said substrate voltage pump provides a voltage of from about −

0.7 volts to about −

1.50 volts to said substrate.

37. The imaging system according to claim 34, wherein said substrate voltage pump provides a voltage of about −

1.1 volts to said substrate.

38. The imaging system according to claim 29, wherein said substrate voltage pump provides a positive voltage to said substrate.

39. The system according to claim 38, wherein said substrate voltage pump provides a voltage of from about 0.25 volts to about 2.5 volts to said substrate.

40. The imaging system according to claim 38, wherein said substrate voltage pump provides a voltage of from about 0.7 volts to about 1.5 volts to said substrate.

41. The imaging system according to claim 38, wherein said substrate voltage pump provides a voltage of about 1.1 volts to said substrate

42. A system comprising:

(i) a processor; and

(ii) a CMOS imaging device coupled to said processor and including;

a substrate;

a photosensitive area within said substrate for accumulating photo-generated charge in said area;

a readout circuit comprising at least an output transistor formed in said substrate; and

a substrate voltage pump coupled to a supply voltage and connected to supply said substrate with a voltage.

43. The system according to claim 42, wherein said photosensitive area comprises a photogate.

44. The system according to claim 42, wherein said photosensitive area comprises a photodiode.

45. The system according to claim 42, wherein said photosensitive area comprises a photoconductor.

46. The system according to claim 42, further comprising a controllable charge transfer region having a control terminal, said transfer region being formed in said substrate adjacent said photosensitive area and having a node connected to a gate of said output transistor and at least one charge transfer device for transferring charge from said photosensitive area to said node in accordance with a control signal applied to said control terminal.

47. The system according to claim 42, wherein said substrate voltage pump provides a negative voltage to said substrate.

48. The system according to claim 47, wherein said substrate voltage pump provides a voltage of from about −

0.25 volts to about −

2.5 volts to said substrate.

49. The system according to claim 47, wherein said substrate voltage pump provides a voltage of from about −

0.7 volts to about −

1.5 volts to said substrate.

50. The system according to claim 49, wherein said substrate voltage pump provides a voltage of about −

1.1 volts to said substrate.

51. The system according to claim 42, wherein said substrate voltage pump provides a positive voltage to said substrate.

52. The system according to claim 51, wherein said substrate voltage pump provides a voltage of from about 0.25 volts to about 2.5 volts to said substrate.

53. The system according to claim 51, wherein said substrate voltage pump provides a voltage of from about 0.7 volts to about 1.5 volts to said substrate.

54. The system according to claim 51, wherein said substrate voltage pump provides a voltage of about 1.1 volts to said substrate.

55. A method for reducing the charge leakage across transistors formed in a substrate of a CMOS imager circuit, said method comprising negatively biasing said substrate with a substrate voltage pump, wherein said substrate voltage pump provides a voltage of from about −

2.5 to about 2.5 volts to said substrate.

80. The imaging device according to claim 55, further comprising a substrate voltage pump coupled to a supply voltage and connected to supply said substrate with a voltage.

56. An imaging device comprising:

a substrate;

a photosensitive area within a first conductively doped well formed in said substrate for accumulating photo-generated charge in said area; and

a readout circuit formed in a second conductively doped well.

57. The imaging device according to claim 56, wherein said first and second conductively doped wells are p-wells.

58. The imaging device according to claim 56, wherein the accumulation of charge in said photosensitive area is controlled by a photogate.

59. The imaging device according to claim 56, wherein said photosensitive area comprises a photodiode.

60. The imaging device according to claim 56, wherein the accumulation of charge in said photosensitive area is controlled by a photoconductor.

61. The imaging device according to claim 56, further comprising:

a controllable charge transfer region having a control terminal, said transfer region being formed in said first conductively doped well in said substrate and adjacent said photosensitive area and having a node connected to a gate of said output transistor; and

at least one charge transfer device formed in said first conductively doped well for transferring charge from said photosensitive area to said node in accordance with a control signal applied to said control terminal.

62. The imaging device according to claim 57, wherein said first p-well is selectively doped to optimize the cross-talk, collection efficiency and transistor leakage in said imaging device.

63. The imaging device according to claim 62, wherein said first p-well is doped with boron.

64. The imaging device according to claim 63, wherein said first p-well is doped with boron implanted at a total dose of from about 1.0×

10¹¹ ions/cm² to about 1.0×

10¹³ ions/cm².

65. The imaging device according to claim 63, wherein said first p-well is doped with boron implanted at a total dose of from about 2.0×

10¹¹ ions/cm² to about 5.0×

10^{12 ions/cm2}.

66. The imaging device according to claim 63, wherein said first p-well is doped with boron implanted at a total dose of about 5.0×

10¹¹ ions/cm².

67. The imaging device according to claim 57, wherein said first p-well has a depth of from about 2 to about 8 microns.

68. The imaging device according to claim 67, wherein said first p-well has a depth of about 5 microns.

69. The imaging device according to claim 57, wherein said second p-well is selectively doped to provide high speed in said imaging device.

70. The imaging device according to claim 69, wherein said second p-well is doped with boron.

71. The imaging device according to claim 69, wherein said second p-well is doped with boron implanted at a total dose of from about 5.0×

10¹¹ ions/cm² to about 5.0×

10¹³ ions/cm².

72. The imaging device according to claim 69, wherein said second p-well is doped with boron implanted at a total dose of from about 1.0×

10¹² ions/cm² to about 2.0×

10¹³ ions/cm².

73. The imaging device according to claim 69, wherein said second p-well is doped with boron implanted at a total dose of about 4.0×

10¹² ions/cm².

74. The imaging device according to claim 57, wherein said first p-well is doped with boron at a total dose of from about 1.0×

10¹¹ ions/cm² to about 1.0×

10¹³ ions/cm² and said second p-well is doped with boron at a total dose of from about 5.0×

10¹¹ ions/cm² to about 5.0×

10¹³ ions/cm².

75. The imaging device according to claim 74, wherein said first p-well is doped with boron at a total dose of from about 2.0×

10¹¹ ions/cm² to about 5.0×

10¹² ions/cm² and said second p-well is doped with boron at a total dose of from about 1.0×

10¹² ions/cm² to about 2.0×

10¹³ ions/cm².

76. The imaging device according to claim 74 wherein said first p-well is doped with boron at a total dose of about 5×

10¹¹ and has a depth of about 3 to 6 microns and said second p-well is doped with boron at a total dose of about 4×

10¹² and has a depth of about 0.5 to 3 microns.

77. The imaging device according to claim 76 wherein said first p-well is doped with boron at a total dose of about 5×

10¹¹ and has a depth of about 5 microns and said second p-well is doped with boron at a total dose of about 4×

10¹² and has a depth of about 0.8 to 2.8 microns.

78. The imaging device according to claim 57, wherein an n-well is formed in said substrate between said first p-well and said second p-well.

79. The imaging device according to claim 57, wherein said second p-well is formed within an n-well.

81. The imaging device according to claim 56, further comprising a first substrate voltage pump coupled to a supply voltage and connected to supply said first p-well with a first predetermined voltage.

82. The imaging device according to claim 76, further comprising a second substrate voltage pump coupled to a supply voltage and connected to supply said second p-well with a second predetermined voltage.

83. The imaging device according to claim 74, further comprising a first substrate voltage pump coupled to a supply voltage and connected to supply said first p-well with a first predetermined voltage;

a second substrate voltage pump coupled to a supply voltage and connected to supply said second p-well with a second predetermined voltage; and

a third substrate voltage pump coupled to a supply voltage and connected to supply said n-well with a third predetermined voltage.

84. An imaging device including a semiconductor integrated circuit substrate, said imaging device comprising:

a photosensitive device formed in a first p-well in said substrate for accumulating photo-generated charge in an underlying portion of said substrate;

a readout circuit formed in a second conductively doped well;

a reset transistor formed in said first p-well in said substrate for resetting said node; and

a row select transistor formed in said first p-well in said substrate.

85. The imaging device according to claim 84, wherein said photosensitive device is a photogate.

86. The imaging device according to claim 84, wherein said photosensitive device is a photodiode.

87. The imaging device according to claim 84, wherein said photosensitive device is a photoconductor.

88. The imaging device according to claim 84, further comprising:

a controllable charge transfer region having a control terminal, said transfer region being formed in said first p-well in said substrate and adjacent said photosensitive area and having a node formed in a first doped area of said substrate connected to a gate of said output transistor; and

at least one charge transfer device formed in said first p-well in said substrate for transferring charge from said photosensitive area to said node in accordance with a control signal applied to said control terminal.

89. The imaging device according to claim 84, wherein said first p-well is selectively doped to optimize the cross-talk, collection efficiency and transistor leakage in said imaging device.

90. The imaging device according to claim 89, wherein said first p-well is doped with boron.

91. The imaging device according to claim 90, wherein said first p-well is doped with boron implanted at a total dose of from about 1.0×

10¹¹ ions/cm² to about 1.0×

10¹³ ions/cm².

92. The imaging device according to claim 90, wherein said first p-well is doped with boron implanted at a total dose of from about 2.0×

10¹¹ ions/cm² to about 5.0×

10¹² ions/cm².

93. The imaging device according to claim 90, wherein said first p-well is doped with boron implanted at a total dose of about 5.0×

10¹¹ ions/cm².

94. The imaging device according to claim 84, wherein said first p-well has a depth of from about 2 to about 8 microns.

95. The imaging device according to claim 94, wherein said first p-well has a depth of about 5 microns.

96. The imaging device according to claim 84, wherein said second p-well is selectively doped to provide high speed in said imaging device.

97. The imaging device according to claim 96, wherein said second p-well is doped with boron.

98. The imaging device according to claim 97, wherein said second p-well is doped with boron implanted at a total dose of from about 5.0×

10¹¹ ions/cm² to about 5.0×

10¹³ ions/cm².

99. The imaging device according to claim 97, wherein said second p-well is doped with boron implanted at a total dose of from about 1.0×

10¹² ions/cm² to about 2.0×

10¹³ ions/cm².

100. The imaging device according to claim 97, wherein said second p-well is doped with boron at a concentration of about 4.0×

10¹² ions/cm².

101. The imaging device according to claim 84, wherein said first p-well is doped with boron at a total dose of from about 1.0×

10¹¹ ions/cm² to about 1.0×

10¹³ ions/cm² and said second p-well is doped with boron at a total dose of from about 5.0×

10¹¹ ions/cm² to about 5.0×

10¹³ ions/cm².

102. The imaging device according to claim 101, wherein said first p-well is doped with boron at a total dose of from about 2.0×

10¹¹ ions/cm² to about 5.0×

10¹² ions/cm² and said second p-well is doped with boron at a total dose of from about 1.0×

10¹² ions/cm² to about 2.0×

10¹³ ions/cm².

103. The imaging device according to claim 100 wherein said first p-well is doped with boron at a total dose of about 5×

10¹¹ and has a depth of about 3 to 6 microns and said second p-well is doped with boron at a total dose of about 4×

10¹² and has a depth of about 0.8 to 2.8 micron.

104. The imaging device according to claim 84, wherein said wells are formed in an n-type substrate.

105. The imaging device according to claim 84, further comprising a substrate voltage pump coupled to a supply voltage and connected to supply said substrate with a voltage.

106. The imaging device according to claim 84, further comprising a first substrate voltage pump coupled to a supply voltage and connected to supply said first p-well with a first predetermined voltage.

107. The imaging device according to claim 106, further comprising a second substrate voltage pump coupled to a supply voltage and connected to supply said second p-well with a second predetermined voltage.

108. The imaging device according to claim 104, further comprising a first substrate voltage pump coupled to a supply voltage and connected to supply said first p-well with a first predetermined voltage;

a second substrate voltage pump coupled to a supply voltage and connected to supply said second p-well with a second predetermined voltage; and

a third substrate voltage pump coupled to a supply voltage and connected to supply said n-type substrate with a third predetermined voltage.

109. An imaging system comprising:

(i) a processor; and

(ii) a CMOS imaging device coupled to said processor and including;

a photosensitive area within a first p-well formed in a substrate for accumulating photo-generated charge in said area; and

a readout circuit formed in a second conductively doped well.

110. The system according to claim 109, wherein the accumulation of charge in said photosensitive area is controlled by a photogate.

111. The system according to claim 109, wherein said photosensitive area is a photodiode.

112. The system according to claim 109, wherein said photosensitive area is controlled by a photoconductor.

113. The system according to claim 109, further comprising:

a controllable charge transfer region having a control terminal, said transfer region being formed in said first p-well and adjacent said photosensitive area and having a node connected to a gate of said output transistor; and

at least one charge transfer device formed over said charge transfer region for transferring charge from said photosensitive area to said node in accordance with a control signal applied to said control terminal.

114. The system according to claim 109, wherein said first p-well is selectively doped to optimize the cross-talk, collection efficiency and transistor leakage.

115. The system according to claim 109, wherein said first p-well is doped with boron.

116. The system according to claim 115, wherein said first p-well is doped with boron implanted at a total dose of from about 1.0×

10¹¹ ions/cm² to about 1.0×

10¹³ ions/cm².

117. The system according to claim 115, wherein said first p-well is doped with boron implanted at a total dose of from about 2.0×

10¹¹ ions/cm² to about 5.0×

10¹² ions/cm².

118. The system according to claim 115, wherein said first p-well is doped with boron implanted at a total dose of about 5.0×

10¹¹ ions/cm².

119. The system according to claim 109, wherein said first p-well has a depth of from about 2 to about 8 microns.

120. The system according to claim 119, wherein said first p-well has a depth of about 5 microns.

121. The system according to claim 109, wherein said second p-well is selectively doped to provide high speed in said imaging device.

122. The system according to claim 121, wherein said second p-well is doped with boron.

123. The system according to claim 121, wherein said second p-well is doped with boron implanted at a total dose of from about 5.0×

10¹¹ ions/cm² to about 5.0×

10¹³ ions/cm².

124. The system according to claim 121, wherein said second p-well is doped with boron implanted at a total dose of from about 1.0×

10¹² ions/cm² to about 2.0×

10¹³ ions/cm².

125. The system according to claim 121, wherein said second p-well is doped with boron at a concentration of about 4.0×

10¹² ions/cm².

126. The imaging device according to claim 109, wherein said first p-well is doped with boron at a total dose of from about 1.0×

10¹¹ ions/cm² to about 1.0×

10¹³ ions/cm² and said second p-well is doped with boron at a total dose of from about 5.0×

10¹¹ ions/cm² to about 5.0×

10¹³ ions/cm².

127. The imaging device according to claim 126, wherein said first p-well is doped with boron at a total dose of from about 2.0×

10¹¹ ions/cm² to about 5.0×

10¹² ions/cm² and said second p-well is doped with boron at a total dose of from about 1.0×

10¹² ions/cm² to about 2.0×

10¹³ ions/cm².

128. The imaging device according to claim 126 wherein said first p-well is doped with boron at a total dose of about 5×

10¹¹ and has a depth of about 3 to 6 microns and said second p-well is doped with boron at a total dose of about 4×

10¹² and has a depth of about 0.8 to 2.8 micron.

129. The system according to claim 109, wherein said second p-well is formed within an n-well.

130. The system according to claim 109, further comprising a substrate voltage pump coupled to a supply voltage and connected to supply said substrate with a voltage.

131. The system according to claim 109, further comprising a first substrate voltage pump coupled to a supply voltage and connected to supply said first p-well with a first predetermined voltage.

132. The system according to claim 131, further comprising a second substrate voltage pump coupled to a supply voltage and connected to supply said second p-well with a second predetermined voltage.

133. The system according to claim 129, further comprising a first substrate voltage pump coupled to a supply voltage and connected to supply said first p-well with a first predetermined voltage;

a second substrate voltage pump coupled to a supply voltage and connected to supply said second p-well with a second predetermined voltage; and

a third substrate voltage pump coupled to a supply voltage and connected to supply said n-well with a third predetermined voltage.