Retrograde well structure for a CMOS imager

• US 20030173572A1
• Filed: 11/18/2002
• Published: 09/18/2003
• Est. Priority Date: 06/16/1999
• Status: Active Grant

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Micron Technology, Inc.
• Inventors: Rhodes, Howard E., Durcan, Mark
• Granted Patent: US 6,787,819 B2
• Time in Patent Office: Days
• US Class Current: 257/88
• CPC Class Codes: H01L 27/14601 Structural or functional details thereof
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14683 Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof not peculiar thereto H01L21/00
• CPC Class Codes: H01L 27/14689 MOS based technologies

Abstract

A retrograde well structure for a CMOS imager that improves the quantum efficiency and signal-to-noise ratio of the imager. The retrograde well comprises a doped region with a vertically graded dopant concentration that is lowest at the substrate surface, and highest at the bottom of the well. A single retrograde well may have a single pixel sensor cell, multiple pixel sensor cells, or even an entire array of pixel sensor cells formed therein. The highly concentrated region at the bottom of the retrograde well repels signal carriers from the photosensor so that they are not lost to the substrate, and prevents noise carriers from the substrate from diffusing up into the photosensor. Also disclosed are methods for forming the retrograde well.

Claims

1. A pixel sensor cell for an imaging device, said pixel sensor cell comprising:

a retrograde well of a first conductivity type formed in a substrate;

a photosensitive region formed in said retrograde well; and

a floating diffusion region of a second conductivity type formed in said retrograde well for receiving charges transferred from said photosensitive region.

2. The pixel sensor cell of claim 1, wherein the first conductivity type is p-type, and the second conductivity type is n-type.

3. The pixel sensor cell of claim 2, wherein said retrograde well is doped with boron.

4. The pixel sensor cell of claim 1, wherein the first conductivity type is n-type, and the second conductivity type is p-type.

5. The pixel sensor cell of claim 4, wherein said retrograde well is doped with a dopant selected from the group consisting of arsenic, antimony, and phosphorous.

6. The pixel sensor cell of claim 1, wherein said retrograde well has a dopant concentration within the range of about 1×

10¹⁶ to about 2×

10¹⁸ atoms per cm³ at the bottom of said retrograde well.

7. The pixel sensor cell of claim 6, wherein said retrograde well has a dopant concentration within the range of about 5×

10¹⁴ to about 1×

10¹⁷ atoms per cm³ at the top of said retrograde well.

8. The pixel sensor cell of claim 1, wherein said retrograde well has a dopant concentration within the range of about 5×

10¹⁶ to about 1×

10¹⁸ atoms per cm³ at the bottom of said retrograde well.

9. The pixel sensor cell of claim 8, wherein said retrograde well has a dopant concentration within the range of about 1×

10¹⁵ to about 5×

10¹⁶ atoms per cm³ at the top of said retrograde well.

10. The pixel sensor cell of claim 1, wherein said retrograde well has a dopant concentration of about 3×

10¹⁷ atoms per cm³ at the bottom of said retrograde well.

11. The pixel sensor cell of claim 10, wherein said retrograde well has a dopant concentration of about 5×

10¹⁵ atoms per cm³ at the top of said retrograde well.

12. The pixel sensor cell of claim 1, further comprising a photosensor formed on said photosensitive region for controlling the collection of charges in said photosensitive region.

13. The pixel sensor cell of claim 12, wherein said photosensor is a photodiode sensor.

14. The pixel sensor cell of claim 12, wherein said photosensor is a photogate sensor.

16. The pixel sensor cell of claim 1, further comprising a transfer gate formed on said retrograde well between said photosensor and said floating diffusion region.

17. The pixel sensor cell of claim 1, further comprising a reset transistor formed in said retrograde well for periodically resetting a charge level of said floating diffusion region, said floating diffusion region being the source of said reset transistor.

18. The pixel sensor cell of claim 1, wherein said photosensitive region comprises a doped region of a second conductivity type.

15. The pixel sensor cell of clam 12, wherein said photosensor is a photoconductor sensor.

19. A pixel sensor cell for an imaging device, said pixel sensor cell comprising:

a retrograde well of a first conductivity type formed in a substrate;

a photosensor formed in said retrograde well;

a reset transistor having a gate stack formed in said retrograde well;

a floating diffusion region of a second conductivity type formed in said retrograde well between said photosensor and reset transistor for receiving charges from said photosensor, said reset transistor operating to periodically reset a charge level of said floating diffusion region; and

an output transistor having a gate electrically connected to said floating diffusion region.

20. The pixel sensor cell of claim 19, wherein said photosensor further comprises a doped region of a second conductivity type located in said retrograde well.

21. The pixel sensor cell of claim 19, wherein said photosensor is a photodiode sensor.

22. The pixel sensor cell of claim 19, wherein said photosensor is a photoconductor sensor.

23. The pixel sensor cell of claim 19, further comprising a transfer gate located between said photosensor and said floating diffusion region.

24. The pixel sensor cell of claim 23, wherein said photosensor is a photogate sensor.

25. The pixel sensor cell of claim 19, wherein the first conductivity type is p-type, and the second conductivity type is n-type.

26. The pixel sensor cell of claim 25, wherein said retrograde well is doped with boron.

27. The pixel sensor cell of claim 19, wherein the first conductivity type is n-type, and the second conductivity type is p-type.

28. The pixel sensor cell of claim 27, wherein said retrograde well is doped with a dopant selected from the group consisting of arsenic, antimony, and phosphorous.

29. The pixel sensor cell of claim 19, wherein said retrograde well has a dopant concentration within the range of about 1×

10¹⁶ to about 2×

10¹⁸ atoms per cm³ at the bottom of said retrograde well.

30. The pixel sensor cell of claim 29, wherein said retrograde well has a dopant concentration within the range of about 5×

10¹⁴ to about 1×

10¹⁷ atoms per cm³ at the top of said retrograde well.

31. The pixel sensor cell of claim 19, wherein said retrograde well has a dopant concentration within the range of about 5×

10¹⁶ to about 1×

10¹⁸ atoms per cm³ at the bottom of said retrograde well.

32. The pixel sensor cell of claim 31, wherein said retrograde well has a dopant concentration within the range of about 1×

10¹⁵ to about 5×

10¹⁶ atoms per cm³ at the top of said retrograde well.

33. The pixel sensor cell of claim 19, wherein said retrograde well has a dopant concentration of about 3×

10¹⁷ atoms per cm³ at the bottom of said retrograde well.

34. The pixel sensor cell of claim 31, wherein said retrograde well has a dopant concentration of about 5×

10¹⁵ atoms per cm³ at the top of said retrograde well.

35. A CMOS imager comprising:

a substrate having at least one retrograde well of a first conductivity type;

an array of pixel sensor cells formed in said at least one retrograde well, wherein each pixel sensor cell has a photosensor; and

a circuit electrically connected to receive and process output signals from said array.

36. The CMOS imager of claim 35, wherein said at least one retrograde well comprises one retrograde well.

37. The CMOS imager of claim 35, wherein said at least one retrograde well comprises a plurality of retrograde wells, wherein said array is formed in a first retrograde well of said plurality and said circuit is formed in a second retrograde well of said plurality.

38. The CMOS imager of claim 37, wherein said first retrograde well is doped to a first dopant level, and said second retrograde well is doped to a second dopant level.

39. The CMOS imager of claim 35, wherein each pixel sensor further comprises a floating diffusion region of a second conductivity type located in said at least one retrograde well.

40. The CMOS imager of claim 39, wherein the first conductivity type is p-type, and the second conductivity type is n-type.

41. The CMOS imager of claim 40, wherein said at least one retrograde well is doped with boron.

42. The CMOS imager of claim 39, wherein the first conductivity type is n-type, and the second conductivity type is p-type.

43. The CMOS imager of claim 42, wherein said at least one retrograde well is doped with a dopant selected from the group consisting of arsenic, antimony, and phosphorous.

44. The CMOS imager of claim 35, wherein each pixel sensor cell further comprises a transfer gate located between said photosensor and said floating diffusion region.

45. The CMOS imager of claim 44, wherein the photosensors are photogate sensors.

46. The CMOS imager of claim 35, wherein said at least one retrograde well has a dopant concentration within the range of about 1×

10¹⁶ to about 2×

10¹⁸ atoms per cm³ at the bottom of said at least one retrograde well.

47. The CMOS imager of claim 46, wherein said at least one retrograde well has a dopant concentration within the range of about 5×

10¹⁴ to about 1×

10¹⁷ atoms per cm³ at the top of said at least one retrograde well.

48. The CMOS imager of claim 35, wherein said at least one retrograde well has a dopant concentration within the range of about 5×

10¹⁶ to about 1×

10¹⁸ atoms per cm³ at the bottom of said at least one retrograde well.

49. The CMOS imager of claim 48, wherein said at least one retrograde well has a dopant concentration within the range of about 1×

10¹⁵ to about 5×

10¹⁶ atoms per cm³ at the top of said at least one retrograde well.

50. The CMOS imager of claim 35, wherein said at least one retrograde well has a dopant concentration of about 3×

10¹⁷ atoms per cm³ at the bottom of said at least one retrograde well.

51. The CMOS imager of claim 50, wherein said at least one retrograde well has a dopant concentration of about 5×

10¹⁵ atoms per cm³ at the top of said at least one retrograde well.

52. The CMOS imager of claim 35, wherein the photosensors are photodiode sensors.

53. The CMOS imager of claim 35, wherein the photosensors are photoconductor sensors.

54. An imager comprising:

an array of pixel sensor cells formed in a substrate having at least one retrograde well of a first conductivity type, wherein each pixel sensor cell has a photosensor;

a circuit formed in the substrate and electrically connected to the array for receiving and processing signals representing an image output by the array and for providing output data representing the image; and

a processor for receiving and processing data representing the image.

55. The imager of claim 54, wherein said array, said circuit, and said processor are formed on a single substrate.

56. The imager of claim 54, wherein said array and said circuit are formed on a first substrate, and said processor is formed on a second substrate.

57. The imager of claim 54, wherein said at least one retrograde well comprises one retrograde well.

58. The imager of claim 54, wherein said at least one retrograde well comprises a plurality of retrograde wells, wherein said array is formed in a first retrograde well of said plurality and said circuit is formed in a second retrograde well of said plurality.

59. The imager of claim 57, wherein said first retrograde well is doped to a first dopant level, and said second retrograde well is doped to a second dopant level.

60. The imager of claim 54, wherein each pixel sensor cell further comprises a floating diffusion region of a second conductivity type located in said at least one retrograde well.

61. The imager of claim 60, wherein the first conductivity type is p-type, and the second conductivity type is n-type.

62. The imager of claim 60, wherein the first conductivity type is n-type, and the second conductivity type is p-type.

63. The imager of claim 54, wherein each pixel sensor cell further comprises a transfer gate located between said photosensor and said floating diffusion region.

64. The imager of claim 63, wherein the photosensors are photogate sensors.

65. The imager of claim 54, wherein said at least one retrograde well has a dopant concentration within the range of about 1×

10¹⁶ to about 2×

10¹⁸ atoms per cm³ at the bottom of said at least one retrograde well, and within the range of about 5×

10¹⁴ to about 1×

10¹⁷ atoms per cm³ at the top of said at least one retrograde well.

66. The imager of claim 54, wherein said at least one retrograde well has a dopant concentration within the range of about 5×

10¹⁶ to about 1×

10¹⁸ atoms per cm³ at the bottom of said at least one retrograde well, and within the range of about 1×

10¹⁵ to about 5×

10¹⁶ atoms per cm³ at the top of said at least one retrograde well.

67. The imager of claim 54, wherein said at least one retrograde well has a dopant concentration of about 3×

10¹⁷ atoms per cm³ at the bottom of said at least one retrograde well, and about 5×

10¹⁵ atoms per cm³ at the top of said at least one retrograde well.

68. The imager of claim 54, wherein the photosensors are photodiode sensors.

69. The imager of claim 54, wherein the photosensors are photoconductor sensors.

70. An imager comprising:

a CMOS imager comprising

an array of pixel sensor cells formed in a retrograde well on a substrate, wherein each pixel sensor cell has a photosensitive region, a photosensor formed on the photosensitive region, and a floating diffusion region for receiving and outputting image charge received from the photosensitive region, and

a circuit formed in the substrate and electrically connected to the array for receiving and processing signals representing an image output by the array and for providing output data representing the image; and

a processor for receiving and processing data representing the image.

71. The imager of claim 70, wherein said CMOS imager and said processor are formed on a single substrate.

72. The imager of claim 70, wherein said CMOS imager is formed on a first substrate, and said processor is formed on a second substrate.

73. The imager of claim 70, wherein the retrograde well has a dopant concentration within the range of about 1×

10¹⁶ to about 2×

10¹⁸ atoms per cm³ at the bottom of the retrograde well.

74. The imager of claim 73, wherein the retrograde well has a dopant concentration within the range of about 5×

10¹⁴ to about 1×

10¹⁷ atoms per cm³ at the top of the retrograde well.

75. The imager of claim 70, wherein the retrograde well has a dopant concentration within the range of about 5×

10¹⁶ to about 1×

10¹⁸ atoms per cm³ at the bottom of the retrograde well.

76. The imager of claim 75, wherein the retrograde well has a dopant concentration within the range of about 1×

10¹⁵ to 5×

10¹⁶ atoms per cm³ at the top of the retrograde well.

77. The imager of claim 70, wherein the retrograde well has a dopant concentration of about 3×

10¹⁷ atoms per cm³ at the bottom of the retrograde well.

78. The imager of claim 77, wherein the retrograde well has a dopant concentration of about 5×

10¹⁵ atoms per cm³ at the top of the retrograde well.

79. The imager of claim 70, wherein the retrograde well is a first retrograde well, and said circuit is formed in a second retrograde well.

84. The method of claim 76, wherein the first conductivity type is n-type.

85. The method of claim 84, wherein the retrograde well is doped with a dopant selected from the group consisting of arsenic, antimony, and phosphorous.

80. A method of forming a photosensor for an imaging device, said method comprising the steps of:

forming a retrograde well of a first conductivity type in a substrate; and

forming a photosensor at an upper surface of the retrograde well.

81. The method of claim 80, wherein said step of forming a retrograde well is an ion implantation step.

82. The method of claim 80, wherein the first conductivity type is p-type.

83. The method of claim 82, wherein the retrograde well is doped with boron.

86. The method of claim 80, wherein the retrograde well has a dopant concentration within the range of about 1×

10¹⁶ to about 2×

10¹⁸ atoms per cm³ at the bottom of the retrograde well, and within the range of about 5×

10¹⁴ to about 1×

10¹⁷ atoms per cm³ at the top of the retrograde well.

87. The method of claim 80, wherein the retrograde well has a dopant concentration within the range of about 5×

10¹⁶ to abut 1×

10¹⁸ atoms per cm³ at the bottom of the retrograde well, and within the range of about 1×

10¹⁵ to 5×

10¹⁶ atoms per cm³ at the top of the retrograde well.

88. The method of claim 80, wherein the retrograde well has a dopant concentration of about 3×

10¹⁷ atoms per cm³ at the bottom of the retrograde well, and about 5×

10¹⁵ atoms per cm³ at the top of the retrograde well.

89. The method of claim 80, wherein the photosensor forming step is a photodiode sensor forming step.

90. The method of claim 80, wherein the photosensor forming step is a photoconductor forming step.

91. The method of claim 80, wherein the photosensor further comprises a transfer gate.

92. The method of claim 86, wherein the photosensor forming step is a photogate sensor forming step.

93. A method of forming a pixel sensor cell for an imaging device, said method comprising the steps of:

forming a retrograde well of a first conductivity type in a substrate;

forming a photosensitive region in the retrograde well;

forming a photosensor on an upper surface of the photosensitive region for controlling the collection of charge therein; and

forming a floating diffusion region of a second conductivity type in the retrograde well for receiving charges transferred from said photosensitive region.

94. The method of claim 93, wherein said step of forming a retrograde well is an ion implantation step.

95. The method of claim 93, wherein the first conductivity type is p-type, and the second conductivity type is n-type.

96. The method of claim 95, wherein the retrograde well is doped with boron.

97. The method of claim 93, wherein the first conductivity type is n-type, and the second conductivity type is p-type.

98. The method of claim 97, wherein the retrograde well is doped with a dopant selected from the group consisting of arsenic, antimony, and phosphorous.

99. The method of claim 93, wherein the retrograde well has a dopant concentration within the range of about 1×

10¹⁶ to about 2×

10¹⁸ atoms per cm³ at the bottom of the retrograde well, and within the range of about 5×

10¹⁴ to about 1×

10¹⁷ atoms per cm³ at the top of the retrograde well.

100. The method of claim 93, wherein the retrograde well has a dopant concentration within the range of about 5×

10¹⁶ to about 1×

10¹⁸ atoms per cm³ at the bottom of the retrograde well, and within the range of about 1×

10¹⁵ to about 5×

10¹⁶ atoms per cm³ at the top of the retrograde well.

101. The method of claim 93, wherein the retrograde well has a dopant concentration of about 3×

10¹⁷ atoms per cm³ at the bottom of the retrograde well, and about 5×

10¹⁵ atoms per cm³ at the top of the retrograde well.

102. The method of claim 93, wherein the photosensor is a photodiode sensor.

103. The method of claim 93, wherein the photosensor is a photoconductor sensor.

104. The method of claim 93, further comprising a step of forming a transfer gate on the retrograde well between the photosensor and the floating diffusion region.

105. The method of claim 104, wherein the photosensor is a photogate sensor.

106. The method of claim 93, further comprising a step of forming a reset transistor in the retrograde well for periodically resetting a charge level of the floating diffusion region, said floating diffusion region being the source of the reset transistor.

107. The method of claim 93, wherein the photosensitive region comprises a doped region of a second conductivity type.

108. A method of forming a pixel array for an imaging device, said method comprising the steps of:

forming a retrograde well of a first conductivity type in a substrate; and

forming a plurality of pixel sensor cells in the retrograde well, wherein each pixel sensor cell has a photosensitive region, a photosensor formed on the photosensitive region, and a floating diffusion region of a second conductivity type.

109. The method of claim 108, wherein said step of forming a retrograde well is an ion implantation step.

110. The method of claim 108, wherein the first conductivity type is p-type, and the second conductivity type is n-type.

111. The method of claim 108, wherein the first conductivity type is n-type, and the second conductivity type is p-type.

112. The method of claim 108, wherein the retrograde well has a dopant concentration within the range of about 1×

10¹⁶ to about 2×

10¹⁸ atoms per cm³ at the bottom of the retrograde well, and within the range of about 5×

10¹⁴ to about 1×

10¹⁷ atoms per cm³ at the top of the retrograde well.

113. The method of claim 108, wherein the retrograde well has a dopant concentration within the range of about 5×

10¹⁶ to about 1×

10¹⁸ atoms per cm³ at the bottom of the retrograde well, and within the range of about 1×

10¹⁵ to about 5×

10¹⁶ atoms per cm³ at the top of the retrograde well.

114. The method of claim 108, wherein the retrograde well has a dopant concentration of about 3×

10¹⁷ atoms per cm³ at the bottom of the retrograde well, and about 5×

10¹⁵ atoms per cm³ at the top of the retrograde well.

115. The method of claim 108, wherein the photosensitive region comprises a doped region of a second conductivity type.

116. The method of claim 108, wherein the photosensor of each pixel sensor cell is a photodiode sensor.

117. The method of claim 108, wherein the photosensor of each pixel sensor cell is a photoconductor sensor.

118. The method of claim 108, further comprising a step of forming a transfer gate for each pixel sensor cell on the retrograde well between the photosensor and the floating diffusion region.

119. The method of claim 118, wherein the photosensor of each pixel sensor cell is a photogate sensor.