Frequency converter and methods of use thereof

• US 20030174797A1
• Filed: 03/18/2002
• Published: 09/18/2003
• Est. Priority Date: 03/18/2002
• Status: Active Grant

• Current Assignee: Tamiras Per Pte Ltd LLC (Intellectual Ventures LLC)
• Original Assignee: Genesis Microchip Inc. (STMicroelectronics NV)
• Inventors: Grushin, Stanislav
• Granted Patent: US 7,124,153 B2
• Time in Patent Office: Days
• US Class Current: 375/376
• CPC Class Codes: G06F 1/08 Clock generators with changeable or programmable clock frequency
• CPC Class Codes: H03L 2207/50 All digital phase-locked loop
• CPC Class Codes: H03L 7/091 the phase or frequency detector using a sampling device H03L7/087 takes precedence
• CPC Class Codes: H03L 7/0994 comprising an accumulator

Abstract

An all-digital frequency conversion apparatus is provided that achieves frequency conversion using a simple phase detector and integer and fractional phase feedback information from a digital oscillator output. In an embodiment, a target phase accumulator unit generates a target phase signal to the phase detector unit. The target phase accumulator unit receives inputs from a reference signal input, and a target phase input value. The digital phase detector unit receives the reference signal, a current phase feedback input signal, and the target phase input signal. The phase detector unit outputs a frequency setting signal to a frequency value generator unit. The detector output is based on the difference between the current phase and the target phase. A frequency value generator unit is configured to output a frequency value signal to a digital oscillator unit that generates a corresponding digital output signal that is directly fed back to the current phase feedback input of the phase detector unit. A method, computing system, and software product that implement the present invention are also provided.

Claims

1. An apparatus for digital frequency conversion, the apparatus comprising:

a digital phase detector unit configured to output a first frequency setting signal based on a multiplicity of input signals, the multiplicity of input signals including at least a first reference signal having a first frequency, a current phase feedback signal, and a target phase signal;

a digital target phase accumulator unit coupled to the phase detector unit, wherein the target phase accumulator unit is configured to output the target phase signal based on a multiplicity of input signals including a second reference signal input, and a target phase input value;

a digital frequency value generator unit coupled to the phase detector unit, wherein the digital frequency value is configured to receive the first frequency setting signal and output a frequency value signal; and

a digital oscillator unit coupled to the frequency value generator unit, wherein the oscillator unit is configured to receive the frequency value signal, the digital oscillator unit being further configured to have a digital output signal at a second frequency that is directly fed back to the current phase feedback input of the phase detector unit.

2. The apparatus of claim 1 further comprising:

An output module coupled to the oscillator unit, wherein the output module is configured to receive the digital output signal of the oscillator unit, the output module being further configured to modify the digital output signal and output a modified output signal.

3. The apparatus of claim 1 wherein the current phase feedback signal comprises both integer and fractional phase information of the digital output signal.

4. The apparatus of claim 1 wherein the first frequency setting signal is proportional to the difference between the current phase feedback input signal and the target phase input signal.

5. The apparatus of claim 1 wherein the phase detector unit is further configured to have a second frequency setting signal that is proportional to the difference between the current phase feedback input signal and the target phase input signal.

6. The apparatus of claim 1 wherein the phase detector unit further comprises a multiplexer unit that is configured to receive the first reference signal as a control signal and the first frequency setting signal as a first input, the multiplexer unit being further configured with an output that outputs the first input based on the state of the control signal, wherein the multiplexer output is used by the frequency value generator unit for further calculation.

7. The apparatus of claim 1 wherein the first reference signal is generated by a frequency divider unit receiving an input signal having a third frequency.

8. The apparatus of claim 1 wherein the multiplicity of input signals to the target phase accumulator unit further includes a phase correction input value.

9. The apparatus of claim 1 wherein the second reference signal input to the target phase accumulator unit does not have the same phase as the first reference signal input to phase detector unit.

10. The apparatus of claim 1 wherein the target phase accumulator unit further comprises a multiplexer unit that is configured to receive the second reference signal as a control signal, the target phase input value as a first input, and information derived from a phase correction input value as a second input, the multiplexer unit being further configured to select one of the first and second inputs based on the state of the control signal, wherein the selected input signal is used by the target phase accumulator unit for further calculation.

11. In an all-digital frequency conversion device, a method of frequency conversion, the method comprising the steps of:

(a) determining a first compare period, wherein the first compare period is based on a first reference signal having a first frequency;

(b) calculating a target phase value;

(c) calculating a first frequency setting parameter based on the difference between a current phase value and the target phase value, wherein the current phase value includes integer and fractional phase information;

(d) calculating a frequency value suitable to be used by a digital oscillator to produce an output signal having a corresponding second frequency, wherein calculating the frequency value uses the first frequency setting parameter; and

(e) updating the digital oscillator with the frequency value.

12. The method as recited in claim 11 wherein the calculations in (b) and (c) occur during the first compare period.

13. The method as recited in claim 11 wherein calculating the target phase value in (b) occurs at the during a second compare period, wherein the second compare period is based on a second reference signal.

14. The method as recited in claim 11 wherein calculating the target phase value in (b) includes using a phase correction value.

15. The method as recited in claim 11 further comprising the step of calculating a second frequency setting parameter that is proportional to the difference between the current phase value and the target phase value.

16. The method as recited in claim 15 wherein calculating the frequency value in (d) further comprises using the second frequency setting parameter.

17. The method as recited in claim 11 wherein the first frequency setting parameter is proportional to the difference between the current phase value and the target phase value.

18. The method as recited in claim 11 wherein the value of the first frequency setting parameter is zero outside of the first compare period.

19. The method as recited in claim 11 further comprising the step of conditioning the output signal to produce a conditioned output signal.

20. A system for digital frequency conversion, the system comprising:

a processor arranged to determine a first compare period, wherein the first compare period is based on a first reference signal having a first frequency;

a processor arranged to calculate a target phase value;

a processor arranged to calculate a first frequency setting parameter based on the difference between a current phase value and the target phase value, wherein the current phase value includes integer and fractional phase information;

a processor arranged to calculate a frequency value suitable to be used by a digital oscillator to produce an output signal having a corresponding second frequency, wherein calculating the frequency value uses the first frequency setting parameter; and

a processor arranged to update the digital oscillator with the frequency value.

21. A computer program product for digital frequency conversion, the computer program product comprising:

computer code that determines a first compare period, wherein the first compare period is based on a first reference signal having a first frequency;

computer code that calculates a target phase value;

computer code that calculates a first frequency setting parameter based on the difference between a current phase value and the target phase value, wherein the current phase value includes integer and fractional phase information;

computer code that calculates a frequency value suitable to be used by a digital oscillator to produce an output signal having a corresponding second frequency, wherein calculating the frequency value uses the first frequency setting parameter;

computer code that updates the digital oscillator with the frequency value; and

a computer-readable medium that stores the computer code.

22. A computer program product according to claim 21 wherein the computer-readable medium is one selected from the group consisting of a data signal embodied in a carrier wave, a CD-ROM, a hard disk, a floppy disk, a tape drive, and semiconductor memory.