Method of manufacturing SOI element having body contact

• US 20030205760A1
• Filed: 05/16/2003
• Published: 11/06/2003
• Est. Priority Date: 02/28/1997
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Kawanaka, Shigeru, Yamada, Takashi
• Granted Patent: US 6,841,828 B2
• Time in Patent Office: Days
• US Class Current: 257/347
• CPC Class Codes: H01L 29/66772 Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates H01L29/66666 takes precedence; thin film FinFETs H01L29/66795
• CPC Class Codes: H01L 29/78609 for preventing leakage current H01L29/78618 takes precedence
• CPC Class Codes: H01L 29/78615 with a body contact

Abstract

A semiconductor device comprises a semiconductor substrate having a first insulator, and a semiconductor channel region formed on the first insulator, wherein the semiconductor channel region comprising at least two first regions both having the first conductivity type, a second region of the conductivity type opposite to the first conductivity type, the second region being provided between the two first regions, a second insulator formed on the second region, a gate electrode formed on the second insulator, a third region having the same conductivity type as that of the second region, the third region being electrically conductive to the second region, a third insulator formed on the third region, the third insulator having a width narrower than the widths of an isolation region for isolating the semiconductor formation region, and a fourth region of the same conductivity type as that of the third region, the fourth region being electrically conductive to the third region.

Claims

1. A method of manufacturing a semiconductor device, which comprises:

a semiconductor substrate having a first insulator and a semiconductor layer formed on said first insulator, said semiconductor layer including a plurality of active regions each including at least two source-drain regions of a first conductivity type, a channel region provided between said source-drain regions and having a second conductivity type opposite to said first conductivity type, a gate insulator formed on said channel region, a gate electrode formed on said gate insulator, a channel-body contact connection region having the same conductivity type as that of said channel region and being electrically conductive to said channel region, a second insulator formed on said channel-body contact connection region, and a body contact region having the same conductivity type as that of said channel-body contact connection region and being electrically conductive to said channel-body contact connection region, and an isolation region which electrically isolates said plurality of active regions, said method comprising the step of;

forming said second insulator simultaneously with the formation of an isolation region without varying thickness of said semiconductor layer, whereby a distance between said channel region and said body contact region is narrower than the width of said isolation region at the time of forming said isolation region, said isolation region formed so as to extend as far as said first insulator in order to isolate said semiconductor layer.

2. A method of manufacturing the semiconductor device according to claim 1, wherein said gate electrode is formed on said channel region and said body contact region.

3. A method of manufacturing the semiconductor device according to claim 2, wherein said gate electrode is electrically conductive to said body contact region.

4. A method of manufacturing the semiconductor device according to claim 2, wherein said gate electrode is formed on said body contact region through a body contact insulator.

5. A method of manufacturing a semiconductor device comprising:

preparing a semiconductor substrate;

forming an oxide film on said semiconductor substrate;

forming an active layer on said oxide film; and

forming an isolation region in a desired region of said active layer to separate said active layer into a channel region and a body contact region, an isolation width between said channel region and said body contact region being narrower than the other isolation widths.

6. The method according to claim 5, wherein said isolation is formed by LOCOS method.

7. The method according to claim 5, wherein the isolation width is calculated by a simulation.

8. The method according to claim 5, wherein said forming an isolation region includes forming a region which connects said channel region and said body contact region.

9. The method according to claim 5, further comprising forming a gate electrode on said channel region.