Integrated CMOS imager and microcontroller

• US 20030210334A1
• Filed: 05/13/2002
• Published: 11/13/2003
• Est. Priority Date: 05/13/2002
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Sarwari, Atif
• Granted Patent: US 7,106,367 B2
• Time in Patent Office: Days
• US Class Current: 348/222.1
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof

Abstract

A method and apparatus providing a CMOS imager with an integrated controller on a common integrated circuit substrate. Also integrated on the common substrate are, a serializer circuit including a dynamic arbiter under the control of the microcontroller core and a set of extended special function registers through which data is passed to allow the microcontroller to control the CMOS imager and the serializer circuit.

Claims

1. A CMOS image sensor comprising:

a sensor array;

a pixel data buffer coupled to said sensor array;

a header data buffer;

dynamic arbiter coupled to said pixel data buffer and to said header data buffer;

a processor coupled to said dynamic arbiter; and

an output register coupled to an output of said dynamic arbiter, said dynamic arbiter being adapted to programmably switchingly couple said output register alternately to said pixel data buffer and said header data buffer.

2. A CMOS image sensor as defined in claim 1, wherein said dynamic arbiter comprises a multiplexer circuit.

3. A CMOS image sensor comprising:

a dynamic arbiter coupled to a processor, said dynamic arbiter alternately coupled to a source of pixel data and a source of header data, said dynamic arbiter adapted to receive header data from said source of header data, and to receive pixel data from said source of pixel data and to output said header data and pixel data under control of said processor.

4. A method of controlling an imaging device comprising:

operating a processor to set a particular control value in a special function register of said imaging device, said special function register being coupled to said processor;

controlling a dynamic arbiter device of a serializer circuit, responsive to said particular control value; and

transferring data from a sensor array coupled to said serializer to an output of said serializer through said dynamic arbiter according to said controlling of said dynamic arbiter.

5. A method of controlling an imaging device as defined in claim 4 wherein said controlling said dynamic arbiter further comprises:

switchingly coupling said dynamic arbiter alternately to a source of pixel data coupled to said sensor array and to a source of header data coupled to said processor.

6. A method of controlling an imaging device as defined in claim 4 wherein said processor further comprises an 8051 microcontroller core and wherein said dynamic arbiter includes a multiplexer.

7. An image sensor implemented as a integrated circuit device comprising:

a sensor array disposed on a substrate, said sensor array being adapted to generate an image data in response to a plurality of photons impinging on said sensor array;

a controller disposed on said substrate;

a control register disposed on said substrate;

at least one first communication line disposed on said substrate, said at least one communication first line coupling said sensor array to an output of said image sensor, said at least one first communication line adapted to convey at least a portion of said image data from said sensor array to said output without passing said image data through said controller;

at least one second communication line on said substrate coupling said controller to said sensor array through a register; and

at least one third communication line on said substrate coupling said controller to said control register.

8. A programmable image sensor comprising:

a microcontroller circuit;

an image sensor coupled at an input to receive an output of said microcontroller circuit;

a serializer circuit coupled at an input thereof to an output of said image sensor, said serializer circuit adapted to provide image data from said sensor, at least said microcontroller circuit, and image sensor being disposed on a common integrated circuit.

9. A programmable image sensor as in claim 8 wherein said serializer circuit is also disposed on said common integrated circuit.

10. A programmable image sensor as defined in claim 8, further comprising:

a plurality of special function registers disposed on a common integrated circuit substrate with said microcontroller circuit and said image sensor and disposed outwardly of a boundary of said microcontroller circuit, at least one of said plurality of special function registers being coupled to both said microcontroller circuit and said image sensor.

11. A programmable image sensor as defined in claim 10 wherein said plurality of special function registers comprises:

a sensor control register.

12. A programmable image sensor as defined in claim 10 wherein said plurality of special function registers comprises:

a sensor capture register.

13. A programmable image sensor as defined in claim 10 wherein said plurality of special function registers comprises:

a DMA control register.

14. A programmable image sensor as defined in claim 10 wherein said plurality of special function registers comprises:

a pixel data buffer register.

15. A programmable image sensor as defined in claim 10 wherein said plurality of special function registers comprises:

a header data buffer register.

16. A programmable image sensor as defined in claim 10 wherein said plurality of special function registers comprises:

a pixel data buffer underflow register.

17. A programmable image sensor as defined in claim 10 wherein said plurality of special function registers comprises:

a header data buffer underflow register.

18. A programmable image sensor as defined in claim 10 wherein said plurality of special function registers comprises:

a pixel data buffer overflow register.

19. A programmable image sensor as defined in claim 10 wherein said plurality of special function registers comprises:

a header data buffer overflow register.

20. A programmable image sensor as defined in claim 10 wherein said plurality of special function registers comprises:

a pixel data buffer request latency timer register.

21. A programmable image sensor as defined in claim 10 wherein said plurality of special function registers comprises:

a header buffer request latency timer register.

22. A programmable image sensor as defined in claim 10 wherein said plurality of special function registers comprises:

a randomizer enable register and seed register.

23. A programmable image sensor as defined in claim 10, further comprising:

a random access memory device disposed on a common integrated circuit substrate with said microcontroller circuit and said image sensor and disposed outwardly of a boundary of said microcontroller circuit, said random access memory device being coupled to said microcontroller.

24. A programmable image sensor as defined in claim 11, wherein said microcontroller circuit is adapted to set a value stored in said at least one of said plurality of Special Function Registers.

25. A microcontroller device comprising:

a microcontroller circuit having a read-program output and a read-data output coupled to respective first and second inputs of a logic gate, said microcontroller circuit incorporating a first read-only memory circuit;

an optical sensor array integrated on a common substrate with said microcontroller circuit and adapted to receive a control signal from said microcontroller circuit;

a second memory device integrated on said common substrate and adapted to store both program and data values therein, said memory device having a read input coupled to an output of said logic gate.

26. A microcontroller device as defined in claim 25 wherein said logic gate comprises:

an AND logic gate.

27. An ingestible capsule including single-chip video system comprising:

an ingestible capsule;

a photosensor device having a photosensor array, said photosensor device having a first control input and an image data output;

a processor having a second control output for supplying data to said first control input, said processor and said photosensor device both being disposed on a common substrate and disposed within said capsule; and

a power supply disposed within said capsule and coupled to said photosensor device and said processor.

28. A method of forming an integrated CMOS imaging device comprising the steps of:

fabricating controller circuitry in a first region of a die;

fabricating an array of random access memory cells in a second region of said die;

fabricating an array of CMOS photosensors in a third region of said die;

fabricating a plurality of special function registers in a fourth region of said die; and

fabricating a serializer output circuit adapted to be disposed in a fifth region of said die.

29. A method of providing a video data stream from a CMOS imager, said method comprising:

coupling a processor to a control register;

coupling said processor to a header buffer;

coupling said control register to a dynamic arbiter circuit;

transferring header data from said processor to said control register;

transferring control data from said processor to said control register;

controlling said dynamic arbiter, responsive to said data in said control data buffer, to transfer a portion of said header data to a video data stream at a first location in said video data stream; and

controlling said dynamic arbiter, responsive to said data in said control data buffer, to transfer a further portion of said header data to said video data stream at a second location in said video data stream.

30. A method of providing a video data stream having programmable frame configuration and programmable header contents said method comprising:

transferring control data from a processor to a control register;

transferring header data from said processor to a header data buffer;

transferring said control data from said control register to a dynamic arbiter circuit;

switchingly connecting an input of said dynamic arbiter circuit to an output of said header data buffer and transferring said header data from said header data buffer through said dynamic arbiter to a video data stream at a video data output;

switchingly connecting said input of the dynamic arbiter circuit alternately to an output of a pixel data buffer and transferring pixel data from said pixel data buffer through said dynamic arbiter to said video data stream at said video data output, wherein said switchingly connecting said input of said dynamic arbiter circuit to said respective outputs of said header data buffer and said pixel data buffer is responsive to transferred control data.

31. A method of fabricating a controllable optical sensor array, said method comprising:

forming a microcontroller circuit in a first region of a substrate;

forming a photosensor array device in a second region of said substrate;

forming a memory device in a third region of said substrate;

forming a serializer circuit in a fourth region of said substrate;

forming a plurality of registers in a fifth region of said substrate;

coupling said microcontroller to said plurality of registers;

coupling said microcontroller to said memory device;

coupling said microcontroller to said serializer circuit;

coupling at least one of said plurality of registers to said photosensor array device;

coupling at least one of said plurality of registers to said serializer; and

coupling said photosensor array device to said serializer.

32. A method of forming a CMOS imaging device, said method comprising:

forming a microcontroller circuit on an integrated circuit die;

forming a CMOS sensor array on said integrated circuit die;

forming an image register on said integrated circuit die; and

electrically coupling said image register to said CMOS sensor array and to said microcontroller circuit.

33. A method of fabricating a CMOS image sensor, said method comprising:

fabricating a CMOS image sensor array in a first region of an integrated circuit die;

fabricating a microcontroller circuit in a second region of said integrated circuit die;

fabricating a special function register in a third region of said semiconductor die; and

fabricating a first conductive connection between said microcontroller circuit and said special function register, a second conductive connection between said special function register and said CMOS image sensor array, to enable image data from said CMOS image sensor array to be received at said microcontroller circuit by way of said special function register.

34. A communications architecture for a single chip controller with programmable video capture capabilities comprising:

an microcontroller circuit;

a supplementary special function register, said supplementary special function register being physically disposed outside of said microcontroller circuit, said supplementary special function register being physically coupled to said microcontroller circuit;

a multiplexer physically and logically coupled to said supplementary special function register for receiving an instruction signal output to said special function register by said microcontroller circuit;

a pixel buffer having an input coupled to a video data output of a CMOS sensor array and an output coupled to a first input of said multiplexer;

a header buffer having an input coupled to said microcontroller circuit and an output coupled to a second input of said multiplexer, said multiplexer having an output coupled to an input of a shift register, said shift register being adapted to output a serial digital video data stream.

35. A method of controlling image quality of an image captured by a CMOS sensor array comprising:

exposing one row of CMOS photosensor array to a first portion on an optical image;

addressing said one row of said CMOS photosensor array;

transferring a portion of data received from said one row into a processor;

evaluating said data using said processor;

outputting a control signal from said processor to said CMOS photosensor array;

modifying an operating parameter of said CMOS photosensor array responsive to said control signal; and

using said modified operating parameter of said CMOS photosensor array for image capture by said sensor array.

36. A method of controlling image quality of an image captured by a CMOS sensor array as defined in claim 35 wherein said using said modified operating parameter comprises:

exposing a second row of said CMOS photosensor array to a second portion of an optical image, wherein said exposing said second row is affected by said modifying said operating parameter and wherein said exposing said first and second rows occurs within a single vertical scan of said CMOS photosensor array.

37. A method of controlling image quality of an image captured by a CMOS sensor array as defined in claim 36 wherein said first and second rows are disposed adjacent one another within said CMOS photosensor array.

38. A method of controlling image quality of an image captured by a CMOS sensor array as defined in claim 36 wherein said operating parameter of said CMOS photosensor array comprises exposure time of said second row of said CMOS photosensor array.

39. A method of controlling image quality of an image captured by a CMOS sensor array comprising:

exposing one row of CMOS photosensor array to a first portion on an optical image;

addressing said one row of said CMOS photosensor array;

transferring a portion of data received from said one row into a first register;

transferring said portion of data from said first register into a processor;

evaluating said data using said processor;

outputting a control signal data from said processor into a second register;

transferring said control signal data from said second register to a control input of said CMOS photosensor array;

modifying an operating parameter of said CMOS photosensor array responsive to said control signal; and

using said modified operating parameter of said CMOS photosensor array for image capture by said sensor array.

40. A method of controlling image quality of an image captured by a CMOS sensor array as defined in claim 39, wherein said using said modified operating parameter of said CMOS photosensor array comprises:

exposing a second row of said CMOS photosensor array to a second portion of an optical image, wherein said exposing said second row is affected by said modifying said operating parameter.

41. A CMOS imaging device comprising:

image sensor means for outputting image data related to an optical image impinging on said image sensor means;

serializer means for receiving a first image data and a second header data and for outputting an output data signal including said first image data and said second header data;

first register means coupled said image sensor means for receiving a portion of said first image data;

second register means coupled to said image sensor means for outputting a first control data to said image sensor means;

third register means coupled to said serializer means for outputting a second control data to said serializer means;

fourth register means coupled to said serializer for receiving a third control data from said serializer; and

processor means coupled to said first register means for receiving said portion of said image data, said processor means coupled to said second register means for conveying said first control data to said second register means, said processor means coupled to said third register means for conveying said second control data to said serializer means, and said processor means coupled to said fourth register means for receiving said third control data from said fourth register means.

42. A method of forming a video data stream including a first plurality of header data values and a second plurality of pixel data values wherein a relative proportion of said header data values and said pixel data values is variable under program control, said method comprising:

providing an image sensor, a processor, and a dynamic arbiter on a common integrated circuit substrate;

receiving a first plurality of pixel data at a pixel data buffer from said image sensor;

receiving a second plurality header data at a header data buffer from said processor; and

controlling said dynamic arbiter with said processor to alternately pass header data of said first plurality from said header data buffer and pixel data of said second plurality from said pixel data buffer through said dynamic arbiter and into said video data stream.