System and method for testing integrated circuits by transient signal analysis

• US 20030234658A1
• Filed: 06/20/2002
• Published: 12/25/2003
• Est. Priority Date: 06/20/2002
• Status: Active Grant

• Current Assignee: III Holdings 1, LLC
• Original Assignee: Agilent Technologies, Inc.
• Inventors: Patel, Chintan
• Granted Patent: US 6,759,864 B2
• Time in Patent Office: Days
• US Class Current: 324/762.02
• CPC Class Codes: G01R 31/3191 Calibration
• CPC Class Codes: G01R 31/31932 Comparators

Abstract

A system and method for testing an integrated circuit (IC) by transient signal analysis includes a comparison circuit that is configured to generate a comparison signal from an IC transient signal and a reference signal. Circuitry operationally coupled to the comparison circuit manipulates the comparison signal to generate a first output waveform area indicative of an absolute area of positive and negative portions within the comparison signal. The comparison circuit and the circuitry may include seven operational-amplifiers (op-amps) or ten op-amps. As a further processing sequence, a second output waveform area that is indicative of an absolute area of positive and negative portions within a second comparison signal is generated. In one embodiment, a first value representing the first waveform area and a second value representing the second waveform area are plotted to determine if the plotted X-Y coordinate falls within a predefined standard for determining the pass/fail status of the IC.

Claims

1. A system for testing an integrated circuit (IC) by transient signal analysis comprising:

a comparison circuit configured to generate a comparison signal from an IC transient signal and a reference signal, said IC transient signal being specific to a monitored supply voltage at said IC; and

circuitry operationally coupled to said comparison circuit, said circuitry being configured to manipulate said comparison signal to generate an output waveform, said output waveform being indicative of changes made by said circuitry to said comparison signal for determining if said IC meets said predetermined standard.

2. The system of claim 1 wherein said comparison signal is representative of a difference between said IC transient signal and said reference signal.

3. The system of claim 1 wherein said comparison circuit and said circuitry include a plurality of operational-amplifiers.

4. The system of claim 1 wherein said circuitry includes a unity-gain inverter in communication with said comparison circuit, said unity-gain inverter being configured to receive and invert said comparison signal.

5. The system of claim 4 wherein said circuitry includes a first rectifier and a second rectifier arranged in a parallel configuration, said first rectifier being in communication with said comparison circuit to receive said comparison signal and to output first portions of said comparison signal, said second rectifier being in communication with said comparison circuit to receive said comparison signal and to output second portions of said comparison signal.

6. The system of claim 5 wherein said circuitry includes a unity-gain adder in communication with said first rectifier and said second rectifier, said unity-gain adder being configured to receive and add said first and second portions of said comparison signal.

7. The system of claim 6 further comprising an integrator in communication with said unity-gain adder, said integrator being configured to identify an output waveform area of said first and second portions of said comparison signal, said output waveform area being indicative of an absolute area of positive and negative portions within said output waveform.

8. The system of claim 7 wherein said unity-gain adder and said integrator are implemented as one operational amplifier.

9. The system of claim 7 further comprising an amplifier in direct communication with said comparison circuit, said amplifier being configured to receive and amplify said comparison signal to provide an auxiliary gain to distinguish variations within said signal.

10. The system of claim 9 wherein said amplifier is an inverting amplifier, said inverting amplifier being configured to invert and amplify said comparison signal.

11. The system of claim 1 wherein said circuitry is configured to generate a second output waveform area from a second comparison signal, said second output waveform area having an absolute area of positive and negative portions within a second output waveform of said second comparison signal, said second comparison signal being generated from a second IC transient signal and a second reference signal.

12. The system of claim 11 further comprising a correlator in communication with said circuitry, said correlator being configured to plot a first value corresponding to an output waveform area calculated for said output waveform over a predefined time interval with a second value corresponding to said second output waveform area over a corresponding time interval for determining if said IC meets said predetermined standard.

13. The system of claim 12 wherein said predetermined standard is a confidence level that is established by applying statistical analysis.

14. A system for determining a pass/fail status of a device under test (DUT) by transient signal analysis comprising:

a source for providing a supply voltage to a power supply terminal of said DUT;

a comparison circuit operationally coupled to said power supply terminal, said comparison circuit being enabled to generate a comparison signal from a DUT transient signal and a reference transient signal, said DUT transient signal being monitored at said power supply terminal of said DUT; and

circuitry operationally coupled to said comparison circuit, said circuitry being enabled to identify sampling portions of said comparison signal, said sampling portions being indicative of said pass/fail status of said DUT.

15. The system of claim 14 wherein said circuitry includes an inverting amplifier, said inverting amplifier being enabled to invert and amplify said comparison signal to generate an inverted amplified signal.

16. The system of claim 15 wherein said circuitry includes a unity-gain inverter operationally coupled to said inverting amplifier, said unity-gain inverter being enabled to invert said inverted amplified signal to generate a twice-inverted amplified signal.

17. The system of claim 16 wherein said circuitry includes a first rectifier and a second rectifier arranged in parallel, said first rectifier being enabled to receive said inverted amplified signal from said inverting amplifier and output first portions of said inverted amplified signal, said second rectifier being enabled to receive said twice-inverted amplified signal from said unity-gain inverter and output second portions of said twice-inverted amplified signal.

18. The system of claim 17 wherein said circuitry includes an adder-integrator circuit operationally coupled to said first rectifier and said second rectifier for respectively receiving said first portions of said inverted amplified signal and said second portions of said twice-inverted amplified signal, said adder-integrator circuit being enabled to add and compute an output waveform area of said first and second portions, said output waveform area being indicative of said sampling portions of said comparison signal.

19. The system of claim 17 wherein said first and second portions are positive portions of said inverted amplified signal and said twice-inverted amplified signal.

20. A method for testing an integrated circuit (IC) by transient signal analysis comprising the steps of:

providing a transient signal specific to a monitored supply voltage to said IC;

generating a comparison signal, including comparing said IC transient signal with a reference signal;

generating an output waveform, including manipulating said comparison signal by circuitry, said output waveform being indicative of changes made by said circuitry to said comparison signal; and

determining if said IC meets a predetermined standard on a basis of said output waveform.

21. The method of claim 20 further comprising a step of identifying a waveform area over a predefined interval, said waveform area being indicative of an absolute area of positive and negative portions within said comparison signal.

22. The method of claim 20 further comprising a step of inverting said comparison signal by a unity-gain inverter.

23. The method of claim 22 further comprising a step of rectifying said comparison signal to provide first and second portions of said comparison signal.

24. The method of claim 23 further comprising a step of adding said first and second portions of said comparison signal.

25. The method of claim 24 further comprising a step of integrating said first and second portions of said comparison signal for identifying an absolute area within said comparison signal.

26. The method of claim 23 further comprising a step of amplifying said comparison signal to provide an auxiliary gain to distinguish variations within said comparison signal.

27. The method of claim 23 wherein amplifying said comparison signal further includes inverting said comparison signal.