Semiconductor die package including drain clip
First Claim
1. A semiconductor die package comprising:
- (a) a semiconductor die comprising a first surface, a second surface, and a vertical power MOSFET having a gate region and a source region at the first surface, and a drain region at the second surface;
(b) a drain clip having a major surface and being electrically coupled to the drain region;
(c) a gate lead electrically coupled to the gate region;
(d) a source lead electrically coupled to the source region; and
(e) a non-conductive molding material encapsulating the semiconductor die, wherein the major surface of the drain clip is exposed through the non-conductive molding material.
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Accused Products
Abstract
One embodiment of the invention is directed to a semiconductor die package including a semiconductor die comprising a first surface, a second surface, and a vertical power MOSFET having a gate region and a source region at the first surface a drain region at the second surface. A drain clip having a major surface is electrically coupled to the drain region. A gate lead is electrically coupled to the gate region. A source lead is electrically coupled to the source region. A non-conductive molding material encapsulates the semiconductor die. The major surface of the drain clip is exposed through the non-conductive molding material.
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Citations
13 Claims
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1. A semiconductor die package comprising:
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(a) a semiconductor die comprising a first surface, a second surface, and a vertical power MOSFET having a gate region and a source region at the first surface, and a drain region at the second surface;
(b) a drain clip having a major surface and being electrically coupled to the drain region;
(c) a gate lead electrically coupled to the gate region;
(d) a source lead electrically coupled to the source region; and
(e) a non-conductive molding material encapsulating the semiconductor die, wherein the major surface of the drain clip is exposed through the non-conductive molding material. - View Dependent Claims (2, 3, 4, 5)
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6. A semiconductor die package comprising:
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(a) a semiconductor die comprising a first surface, a second surface, and a vertical power MOSFET having a gate region and a source region at the first surface, and a drain region at the second surface;
(b) a drain clip having a major surface and being electrically coupled to the drain region;
(c) a drain lead electrically coupled to an end of the drain clip;
(d) a gate lead electrically coupled to the gate region;
(e) a source lead structure including at least one source lead and a protruding region having a major surface, and a die attach surface opposite the major surface of the source lead structure, the die attach surface being electrically coupled to the source region; and
(f) a non-conductive molding material encapsulating the semiconductor die, wherein the major surface of the drain clip is exposed through the non-conductive molding material. - View Dependent Claims (7, 8)
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9. A method for making a semiconductor die package, the method comprising:
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(a) providing a semiconductor die comprising a first surface, a second surface, and a vertical power MOSFET having a gate region and a source region at the first surface, and a drain region at the second surface;
(b) attaching a source lead structure to the source region and a gate lead to the gate region;
(c) attaching a drain clip having a major surface to the drain region;
(d) molding a molding material around the semiconductor die, whereby the major surface is exposed through the molding material. - View Dependent Claims (10, 11, 12, 13)
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Specification