Polysilicon hard mask etch defect particle removal

• US 20040081918A1
• Filed: 10/17/2002
• Published: 04/29/2004
• Est. Priority Date: 10/17/2002
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Lee, Chu-Sheng, Chen, Tou-Yu
• Granted Patent: US 6,852,472 B2
• Time in Patent Office: Days
• US Class Current: 430/314
• CPC Class Codes: H01L 21/32134 by liquid etching only
• CPC Class Codes: H01L 21/32139 using masks
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213

Abstract

The removal of defect particles that may be created during polysilicon hard mask etching, and that are embedded within the polysilicon layer, is disclosed. Oxide is first grown in the polysilicon layer exposed through the patterned hard mask layer, so that the defect particle becomes embedded within the oxide. Oxide growth may be accomplished by rapid thermal oxidation (RTO). The oxide is then exposed to an acidic solution, such as hydrofluoric (HF) acid, to remove the oxide and the embedded defect particle embedded therein.

Claims

1. A method for removing a defect particle created during a silicon-based hard mask etching, comprising:

forming an oxide in a silicon-based layer exposed through a patterned hard mask layer, the defect particle becoming embedded within the oxide; and

,

exposing the oxide to an acidic solution to remove the oxide and the defect particle.

2. The method of claim 1, wherein growing the oxide comprises employing a rapid thermal oxidation (RTO) process.

3. The method of claim 1, wherein employing the RTO process comprises exposing a semiconductor wafer including the patterned hard mask layer and the silicon-based layer to a temperature of substantially 700°

C. for substantially thirty seconds.

4. The method of claim 1, wherein exposing the oxide to the acidic solution comprises exposing the oxide to a hydrofluoric (HF) acidic solution.

5. The method of claim 1, wherein exposing the oxide to the HF acidic solution comprises dipping a semiconductor wafer including the patterned hard mask layer and the silicon-based layer into the HF acidic solution for substantially thirty seconds.

6. The method of claim 1, wherein exposing the oxide to the HF acidic solution comprises exposing the oxide to a substantially 100:

1 water;

HF acid solution.

7. The method of claim 1, further initially comprising etching the hard mask layer through a patterned photoresist layer to pattern the hard mask layer.

8. The method of claim 1, further initially comprising patterning the photoresist layer prior to etching the hard mask layer.

9. The method of claim 1, further initially comprising removing the photoresist layer after etching the hard mask layer.

10. The method of claim 1, further comprising etching the silicon-based layer through the patterned hard mask layer.

11. The method of claim 1, further comprising removing the hard mask layer.

12. The method of claim 1, wherein the hard mask layer comprises an upper layer and a lower layer.

13. The method of claim 12, wherein the upper layer comprises a SiO₂ layer.

14. The method of claim 12, wherein the lower layer comprises a SiON layer.

15. A method for removing a defect particle created during silicon-based hard mask etching, comprising:

growing oxide in a polysilicon layer exposed through a patterned hard mask layer via rapid thermal oxidation (RTO), the defect particle becoming embedded within the oxide; and

,

exposing the oxide to a hydrofluoric (HF) acidic solution to remove the oxide and the defect particle.

16. The method of claim 15, wherein growing the oxide in the silicon-based layer via the RTO comprises exposing a semiconductor wafer including the patterned hard mask layer and the silicon-based layer to a temperature of substantially 700°

C. for substantially thirty seconds.

17. The method of claim 15, wherein exposing the oxide to the HF acidic solution comprises dipping a semiconductor wafer including the patterned hard mask layer and the polysilicon layer into the HF acidic solution for substantially thirty seconds.

18. The method of claim 15, wherein exposing the oxide to the HF acidic solution comprises exposing the oxide to a substantially 100:

1 water;

HF acid solution.

19. The method of claim 15, wherein the hard mask layer comprises an upper SiO₂ layer and a lower SiON layer.

20. A semiconductor device fabricated at least in part by a method comprising:

patterning a photoresist layer over a hard mask layer over a polysilicon layer;

etching the hard mask layer through the patterned photoresist layer to correspondingly pattern the hard mask layer, and resulting in one or more defect particles embedded in the polysilicon layer exposed through the patterned hard mask layer;

removing the photoresist layer;

growing oxide in the polysilicon layer exposed through the patterned hard mask layer, embedding the one or more defect particles in the oxide;

exposing the oxide to an acidic solution to remove the oxide and the one or more defect particles;

etching the polysilicon layer through the patterned hard mask layer; and

removing the hard mask layer.