Flow control in a network environment

• US 20040085901A1
• Filed: 11/05/2002
• Published: 05/06/2004
• Est. Priority Date: 11/05/2002
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Wolrich, Gilbert, Hooper, Donald F., Adiletta, Matthew J., Wilde, Myles J.
• Granted Patent: US 7,433,307 B2
• Time in Patent Office: Days
• US Class Current: 370/235
• CPC Class Codes: H04L 12/5601 Transfer mode dependent, e.g. ATM
• CPC Class Codes: H04L 2012/561 Star, e.g. cross-connect, concentrator, subscriber group equipment, remote electronics
• CPC Class Codes: H04L 2012/5635 Backpressure, e.g. for ABR
• CPC Class Codes: H04L 2012/5636 Monitoring or policing, e.g. compliance with allocated rate, corrective actions
• CPC Class Codes: H04L 47/10 Flow control; Congestion control
• CPC Class Codes: H04L 47/12 Avoiding congestion; Recovering from congestion
• CPC Class Codes: H04L 47/263 Rate modification at the source after receiving feedback
• CPC Class Codes: H04L 47/43 Assembling or disassembling of packets, e.g. segmentation and reassembly [SAR]

Abstract

Providing flow control includes receiving at a router an indication of the ability of each one of multiple ports not directly connected to the router to receive data from the router and controlling transmission of data from the router to the multiple ports based at least on the indication.

Claims

1. A method for providing flow control comprising:

receiving at a router an indication of the ability of each one of multiple ports not directly connected to the router to receive data from the router; and

controlling transmission of data from the router to the multiple ports based at least on the indication.

2. The method of claim 1 further comprising transmitting data from the multiple ports to a network.

3. The method of claim 1 further comprising storing the indication at a storage location.

4. The method of claim 1 further comprising transmitting data from the router to one of the multiple ports if the indication indicates that the one of the multiple ports can accept data.

5. The method of claim 1 further comprising changing a rate of data transmission to the multiple ports based on at least the indication.

6. The method of claim 1 in which the indication includes bits indicating whether or not the multiple ports include can accept data.

7. The method of claim 1 further comprising

receiving at the router an additional indication of the ability of additional ports to accept data from the router, and

controlling transmission of data from the router to the additional ports based at least on the additional indication.

8. The method of claim 7 further comprising storing the additional indication at a storage location address contiguous to another storage location address that stores the indication.

9. The method of claim 1 further comprising receiving the indication at the router on a physical port from a device having access to the multiple ports.

10. The method of claim 1 further comprising receiving the indication at the router on a sideband bus from a device having access to the multiple ports.

11. The method of claim 1 further comprising receiving the indication at the router from a Digital Subscriber Line Access Multiplexer having access to the multiple ports.

12. The method of claim 1 further comprising

receiving multiple vectors at the router, each of the multiple vectors indicating the ability of a subset of the multiple ports to receive data from the router;

assembling the multiple vectors into one vector; and

using the one vector to control transmission of data from the router to the multiple ports.

13. The method of claim 1 in which the data includes a packet.

14. An article for providing flow control, the article including a machine-readable medium having machine-executable instructions, the instructions when executed by a machine causing the machine to perform operations comprising:

receiving at a router an indication of the ability of each one of multiple ports not directly connected to the router to receive data from the router; and

controlling transmission of data from the router to the multiple ports based at least on the indication.

15. The article of claim 14 further comprising transmitting data from the multiple ports to a network.

16. The article of claim 14 further comprising storing the indication at a storage location.

17. The article of claim 14 further comprising transmitting data from the router to one of the multiple ports if the indication indicates that the one of the multiple ports can accept data.

18. The article of claim 14 further comprising changing a rate of data transmission to the multiple ports based on at least the indication.

19. The article of claim 14 in which the indication includes bits indicating whether or not the multiple ports include can accept data.

20. The article of claim 14 further comprising

receiving at the router an additional indication of the ability of additional ports to accept data from the router, and

controlling transmission of data from the router to the additional ports based at least on the additional indication.

21. The article of claim 20 further comprising storing the additional indication at a storage location address contiguous to another storage location address that stores the indication.

22. The article of claim 14 further comprising receiving the indication at the router on a physical port from a device having access to the multiple ports.

23. The article of claim 14 further comprising receiving the indication at the router on a sideband bus from a device having access to the multiple ports.

24. The article of claim 14 further comprising receiving the indication at the router from a Digital Subscriber Line Access Multiplexer having access to the multiple ports.

25. The article of claim 14 further comprising

receiving multiple vectors at the router, each of the multiple vectors indicating the ability of a subset of the multiple ports to receive data from the router;

assembling the multiple vectors into one vector; and

using the one vector to control transmission of data from the router to the multiple ports.

26. The article of claim 14 in which the data includes a packet.

27. A system for providing flow control comprising:

a device configured to provide multiple ports, each configured to transmit data to a network; and

a router not directly connected to the multiple ports and configured to receive an indication of the ability of each of multiple ports to accept data from the router and configured to control transmission of information from the router to the multiple ports based at least on the indication.

28. The system of claim 27 in which the device includes a Digital Subscriber Line Access Multiplexer.

29. The system of claim 27 further comprising a memory mechanism accessible by the router and configured to store the indication.

30. The system of claim 29 in which the router includes the memory mechanism.

31. The system of claim 29 in which the memory mechanism includes a fast memory mechanism accessible by the router.

32. An apparatus for providing flow control comprising:

a receiver processor configured to receive an indication of the ability of each one of multiple ports to accept data from the apparatus;

a transmitter processor configured to control transmission of data from the apparatus to the multiple ports based at least on the indication; and

a bus capable of carrying information between the receiver processor and the transmitter processor.

33. The apparatus of claim 32 further comprising a memory mechanism accessible to the receiver processor and to the transmitter processor and configured to store the indication.

34. The apparatus of claim 33 in which the transmitter processor is also configured to retrieve information about the indication from the memory mechanism and to use the information in controlling transmission of data from the apparatus to multiple ports.

35. The apparatus of claim 33 in which the memory mechanism includes static random access memory.

36. The apparatus of claim 32 in which the receiver processor is also configured to receive multiple indicators, each of the multiple indicators indicating the ability of a subset of the multiple ports to accept data from the apparatus, and to assemble the multiple indicators to form the indication.

37. The apparatus of claim 32 in which the bus includes a high bandwidth bus internal to the apparatus.

38. The apparatus of claim 32 in which the receiver processor is also configured to receive a packet and the transmitter processor is also configured to determine which one of the multiple ports to transmit the packet to based at least on the indication.

39. The apparatus of claim 32 further comprising a microengine configured to execute program threads, the threads including the receiver processor and the transmitter processor.

40. An apparatus comprising:

a receiver processor configured to receive an indication of the ability of each one of multiple ports to accept data from the apparatus, each of the multiple ports not being directly connected to the apparatus.

41. The apparatus of claim 40 in which the receiver processor is also configured to receive multiple indicators, each of the multiple indicators indicating the ability of a subset of the multiple ports to accept data from the apparatus, and to assemble the multiple indicators to form the indication.

42. An apparatus comprising:

a transmitter processor configured to control transmission of data from the apparatus to each one of multiple ports based at least on the indication, the multiple ports not being directly connected to the apparatus.

43. The apparatus of claim 42 in which the transmitter processor is also configured to retrieve information about the indication from a memory mechanism and to use the information in controlling transmission of data from the apparatus to multiple ports.