Beam-forming antenna system

• US 20040095287A1
• Filed: 04/25/2003
• Published: 05/20/2004
• Est. Priority Date: 11/19/2002
• Status: Active Grant

• Current Assignee: Farrokh Mohamadi
• Original Assignee: Farrokh Mohamadi
• Inventors: Mohamadi, Farrokh
• Granted Patent: US 6,870,503 B2
• Time in Patent Office: Days
• US Class Current: 343/824
• CPC Class Codes: H01Q 1/36 Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewithH01Q1/08, H01Q1/14 take precedence
• CPC Class Codes: H01Q 3/2605 Array of radiating elements provided with a feedback control over the element weights, e.g. adaptive arrays
• CPC Class Codes: H01Q 9/0457 electromagnetically coupled to the feed line
• CPC Class Codes: H01Q 9/16 with feed intermediate between the extremities of the antenna, e.g. centre-fed dipole H01Q9/44 takes precedence

Abstract

A beam-forming antenna system includes an array of integrated antenna units. Each integrated antenna unit includes an oscillator coupled to an antenna. A network couples to the integrated antenna units to provide phasing information to the oscillators. A controller controls the phasing information provided by the network to the oscillators

Claims

1. A beam forming system, comprising

a plurality of integrated antenna units, wherein each integrated antenna unit includes an oscillator coupled to an antenna;

a network configured to provide phasing information to each oscillator so as to phase lock at least a subset of the oscillators; and

a controller to control the phasing information, wherein the integrated antenna units, the network, and the controller are all integrated on a substrate.

2. The beam forming system of claim 1, wherein the substrate is a semiconductor substrate.

3. The beam forming system of claim 1, wherein the substrate is a flexible substrate.

4. The beam forming system of claim 1, wherein the phasing information comprises an analog signal.

5. The beam forming system of claim 1, wherein the phasing information comprises a digital signal.

6. The beam forming system of claim 1, wherein the phasing information comprises an input phase offset, and wherein the controller is configured to provide the input phase offset to a selected one of the oscillators in the subset, the remaining oscillators in the subset being coupled by the network to mode lock to the selected oscillator.

7. The beam forming system of claim 6, wherein the remaining oscillators in the subset are arranged from a first to a last oscillator, and wherein the network is configured to unilaterally couple the remaining oscillators in the subset such that an output phase offset from the selected oscillator couples to the first oscillator, an output phase offset from the first oscillator couples to the second oscillator, and so on.

8. The beam forming system of claim 6, wherein the network is arranged to bi-laterally couple the remaining oscillators in the subset.

9. The beam forming system of claim 6, wherein the selected oscillator is chosen based upon a maximum received power level.

10. The beam forming system of claim 9, wherein each integrated antenna unit is configured to compare received a received RF signal power from its antenna to a threshold and to announce to the network that its oscillator is the selected oscillator if the received RF signal power exceeds the threshold.

11. The beam forming system of claim 9, wherein the network is configured to couple a received RF signal from each integrated antenna unit to the controller, and wherein the controller is configured to identify the integrated antenna unit that had the greatest received RF signal power and to select the oscillator within the identified integrated antenna unit as the selected oscillator.

12. The beam forming system of claim 1, wherein each oscillator comprises an voltage-controlled oscillator (VCO).

13. The beam forming system of claim 12, wherein each integrated antenna unit includes a phase-locked loop controlling the oscillation frequency of its VCO.

14. The beam forming system of claim 13, wherein the phasing information comprises an input phase offset, and wherein the controller is configured to provide an input phase offset to each one of the oscillators in the subset.

15. The beam forming system of claim 14, wherein the integrated antenna units are arranged in rows and columns, and wherein the controller is configured to row and column address the input phase offset to each oscillator in the subset, the network including row and column decoders to decode the address received from the controller to identify a particular oscillator in the subset.

16. A clock distribution system, comprising:

a semiconductor substrate;

a first longitudinal conducting plate;

a second longitudinal conducting plate, wherein at least one dielectric layer separates the first longitudinal metal plate from the semiconductor substrate and at least one dielectric layer separates the first and second longitudinal metal plates;

a first plurality of conducting vias extending from a first side of the first longitudinal conducting plate to a first side of the second longitudinal conducting plate;

a second plurality of conducting vias extending from a second side of the first longitudinal conducting plate to a second side of the second longitudinal conducting plate, wherein the combination of the first and second longitudinal conducting plates and the first and second conducting vias forms a rectangular waveguide;

a master clock source configured to transmit a global clock through the rectangular waveguide; and

a local clock source configured to receive the global clock from the rectangular waveguide and to synchronize a local clock to the received global clock.

17. The clock distribution system of claim 16, wherein the global clock source includes a T-shaped dipole projected within the lumen of the rectangular waveguide for transmitting the global clock.

18. The clock distribution system of claim 16, wherein the local clock source includes a T-shaped dipole projected within the lumen of the rectangular waveguide for receiving the global clock.