Method for producing organic electronic devices on deposited dielectric materials

• US 20040124416A1
• Filed: 12/30/2002
• Published: 07/01/2004
• Est. Priority Date: 12/30/2002
• Status: Active Grant

• Current Assignee: Xerox Corporation (Xerox Holdings Corp.)
• Original Assignee: Xerox Corporation (Xerox Holdings Corp.)
• Inventors: Street, Robert A., Northrup, John E., Knipp, Dietmar P.
• Granted Patent: US 6,869,821 B2
• Time in Patent Office: Days
• US Class Current: 257/72
• CPC Class Codes: H01L 21/0234 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/3145 formed by deposition from a gas or vapour
• CPC Class Codes: H01L 21/31612 on a silicon body
• CPC Class Codes: H01L 21/3185 of siliconnitrides
• CPC Class Codes: H10K 10/466 Lateral bottom-gate IGFETs comprising only a single gate
• CPC Class Codes: H10K 10/472 the gate dielectric comprising only inorganic materials

Abstract

A deposited dielectric (e.g., PECVD silicon nitride) formed on an inexpensive glass or plastic foil substrate is modified to facilitate the formation of high mobility organic semiconductor films. In one embodiment, the dielectric is plasma treated using nitrogen or argon gas to reduce the surface roughness of the dielectric layer below 5 nm (peak-to-valley). An organic semiconductor film (e.g., pentacene) grown on the modified dielectric exhibits high mobility and large polycrystalline grain sizes.

Claims

1. A method for fabricating an organic electronic device comprising:

depositing a dielectric material over a substrate;

plasma treating the dielectric material; and

depositing an organic semiconductor film over the plasma treated dielectric material.

2. The method according to claim 1, wherein depositing the dielectric material comprises depositing one of silicon oxide, silicon nitride, and silicon oxy-nitride using a Plasma Enhanced Chemical Vapor Deposition process.

3. The method according to claim 1, wherein plasma treating the dielectric material comprises utilizing a gas selected from the group consisting of Nitrogen (N₂) and Argon (Ar).

4. The method according to claim 3, wherein plasma treating the dielectric material comprises placing the substrate in a reactor chamber maintained in a range of 200 to 500 mTorr, flowing the gas at a rate in the range of 100-200 sccm.

5. The method according to claim 3, wherein plasma treating further comprises sustaining a plasma until the dielectric material has a peak-to-valley surface roughness of less than 5 nm.

6. The method according to claim 1, wherein the organic semiconductor film comprises a polyacene.

7. The method according to claim 6, wherein the organic semiconductor film comprises pentacene.

8. The method according to claim 1, further comprising forming a gate structure before depositing the dielectric material, and forming source/drain structures on the dielectric material before depositing the organic semiconductor film.

9. The method according to claim 1, further comprising forming a gate structure before depositing the dielectric material, and forming source/drain structures after depositing the organic semiconductor film.

10. The method according to claim 1, further comprising chemically treating an upper surface of the dielectric material before depositing the organic semiconductor film.

11. A method for fabricating an organic electronic device comprising:

depositing a dielectric material over a substrate;

smoothing the deposited dielectric material until the deposited dielectric material has a peak-to-valley surface roughness that is less than 5 nm; and

depositing an organic semiconductor film over the smoothed dielectric material.

12. The method according to claim 11, wherein depositing the dielectric material comprises depositing one of silicon oxide, silicon nitride, and silicon oxy-nitride using a Plasma Enhanced Chemical Vapor Deposition process.

13. The method according to claim 11, wherein the organic semiconductor film comprises a polyacene material.

14. The method according to claim 13, wherein the polyacene comprises pentacene.

15. A large-area electronic device comprising:

a substrate;

an amorphous inorganic dielectric layer deposited over the substrate; and

an organic film formed on the amorphous inorganic dielectric layer,

wherein a surface roughness of the amorphous inorganic dielectric layer is less than 5 nm (peak-to-valley).

16. The large-area electronic device according to claim 15, wherein the substrate comprises at least one of plastic foil, metal foil, and glass.

17. The large-area electronic device according to claim 15, wherein the amorphous inorganic dielectric layer comprises at least one of silicon nitride, silicon oxide, and silicon oxy-nitride.

18. The large-area electronic device according to claim 15, wherein the amorphous inorganic dielectric layer comprises a thickness in the range of 10 to 500 nm.

19. The large-area electronic device according to claim 15, wherein the organic film comprises thermally deposited polyacene-based material.

20. The large-area electronic device according to claim 19, wherein the thermally deposited polyacene-based material comprises pentacene.