Wafer bonding for three-dimensional (3D) integration

• US 20040142540A1
• Filed: 10/27/2003
• Published: 07/22/2004
• Est. Priority Date: 02/06/2002
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Kim, Sarah E., List, R. Scott, Kellar, Scot A.
• Granted Patent: US 7,037,804 B2
• Time in Patent Office: Days
• US Class Current: 438/455
• CPC Class Codes: H01L 21/185 Joining of semiconductor bodies for junction formation
• CPC Class Codes: H01L 21/743 Making of internal connections, substrate contacts
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05655 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/05666 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/13124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/13139 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/13144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/13147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13155 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/13164 Palladium [Pd] as principal constituent
• CPC Class Codes: H01L 2224/13166 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/75102 Vacuum chamber
• CPC Class Codes: H01L 2224/75315 : Elastomer inlay
• CPC Class Codes: H01L 2224/81203 : Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
• CPC Class Codes: H01L 2224/81894 : Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
• CPC Class Codes: H01L 2224/81895 : between electrically conductive surfaces, e.g. copper-copper direct bonding, surface activated bonding
• CPC Class Codes: H01L 2225/06513 : Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06541 : Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV] manufacturing via connections per se H01L21/76898
• CPC Class Codes: H01L 2225/06589 : Thermal management, e.g. cooling
• CPC Class Codes: H01L 24/12 : Structure, shape, material or disposition of the bump connectors prior to the connecting process
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/72 : Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
• CPC Class Codes: H01L 24/75 : Apparatus for connecting with bump connectors or layer connectors
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/04941 : TiN
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/30107 : Inductance

Abstract

A three-dimensional (3-D) integrated chip system is provided with a first wafer including one or more integrated circuit (IC) devices; a second wafer including one or more integrated circuit (IC) devices; and a metal bonding layer deposited on opposing surfaces of the first and second wafers at designated locations to establish electrical connections between active IC devices on the first and second wafers and to provide metal bonding between the adjacent first and second wafers, when the first wafer is pressed against the second wafer using a flexible bladder press to account for height differences of the metal bonding layer across the opposing surfaces of the first and second wafers.

Claims

1. A three-dimensional (3-D) integrated chip system, comprising:

a first wafer including one or more integrated circuit (IC) devices;

a second wafer including one or more integrated circuit (IC) devices; and

a metal bonding layer deposited on opposing surfaces of the first and second wafers at designated locations to establish electrical connections between active IC devices on the first and second wafers and to provide metal bonding between the adjacent first and second wafers, when the first wafer is pressed against the second wafer using a flexible bladder press to account for height differences of the metal bonding layer across the opposing surfaces of the first and second wafers.

2. The three-dimensional (3-D) integrated chip system as claimed in claim 1, wherein the metal bonding layer includes a plurality of Copper (Cu) lines on opposing surface of the first and second wafers to serve as electrical contacts between active IC devices on both the first and second wafers.

3. The three-dimensional (3-D) integrated chip system as claimed in claim 1, wherein the flexible bladder press is a hollow steel container including an input valve arranged to input air pressure, and a bottom membrane positioned over the surface of the first wafer to apply the pressure differently at different points on the first wafer as the first wafer is pressed against the second wafer to account for the height differences of the metal bonding layer across the opposing surfaces of the first and second wafers.

4. The three-dimensional (3-D) integrated chip system as claimed in claim 1, wherein the pressure required to account for the height differences of the metal bonding layer across the opposing surfaces of the first and second wafers is determined based on the following equations:

5. The three-dimensional (3-D) integrated chip system as claimed in claim 1, wherein the first wafer is thinner than the second wafer to conform to the height differences of the metal bonding layer across the opposing surfaces of the first and second wafers.

6. The three-dimensional (3-D) integrated chip system as claimed in claim 1, wherein the flexible bladder press is an autoclave including an input valve arranged to input high-pressure gas into a chamber;

a heater arranged to heat the gas at a predetermined temperature; and

at least one vacuum bag arranged to contain the first and second wafers in position for metal bonding.

7. The three-dimensional (3-D) integrated chip system as claimed in claim 6, wherein the vacuum bag is a flexible bag that is evacuated and then sealed to ensure that the first and second wafers are bonded, via the metal bonding layer.

8. A wafer bonding method, comprising:

selectively forming metallic bumps on opposing surfaces of adjacent wafers each including one or more integrated circuit (IC) devices;

selectively aligning the adjacent wafers to form a stack; and

bonding the metallic bumps on the surface of one wafer with the metallic bumps on the surface of the other wafer to establish electrical connections between active IC devices on the adjacent wafers using a flexible bladder press to account for height differences of the metallic bumps across the opposing surfaces of the adjacent wafers.

9. The wafer bonding method as claimed in claim 8, wherein the metallic bumps are Copper (Cu) bumps deposited on opposing surface of the first and second wafers to serve as electrical contacts between active IC devices on both the first and second wafers.

10. The wafer bonding method as claimed in claim 8, wherein the flexible bladder press is a hollow steel container including an input valve arranged to input air pressure, and a bottom membrane positioned over the surface of the first wafer to apply the pressure differently at different points on the first wafer as the first wafer is pressed against the second wafer to account for the height differences of the metallic bumps across the opposing surfaces of the first and second wafers.

11. The wafer bonding method as claimed in claim 8, wherein the pressure required to account for the height differences of the metallic bumps across the opposing surfaces of the first and second wafers is determined based on the following equations:

12. The wafer bonding method as claimed in claim 8, wherein the first wafer is thinner than the second wafer to conform to the height differences of the metallic bumps across the opposing surfaces of the first and second wafers.

13. The wafer bonding method as claimed in claim 8, wherein the flexible bladder press is an autoclave including an input valve arranged to input high-pressure gas into a chamber;

a heater arranged to heat the gas at a predetermined temperature; and

at least one vacuum bag arranged to contain the first and second wafers in position for metal bonding.

14. The wafer bonding method as claimed in claim 13, wherein the vacuum bag is a flexible bag that is evacuated and then sealed to ensure that the first and second wafers are bonded, via the metallic bumps.

15. A three-dimensional (3-D) integrated chip system, comprising:

a first wafer including one or more integrated circuit (IC) devices, and metallic bumps arranged to electrical interconnection;

a second wafer including one or more integrated circuit (IC) devices, and metallic bumps arranged for electrical interconnection and with alignment with the first wafer to form a stack; and

a flexible bladder press arranged to press the first wafer against the second wafer to bond the metallic bumps on the surface of the first wafer with the metallic bumps on the surface of the second wafer and establish electrical connections between active IC devices on the adjacent wafers.

16. The three-dimensional (3-D) integrated chip system as claimed in claim 15, wherein the flexible bladder press is arranged to press the first wafer against the second wafer to account for height differences of the metallic bumps across the opposing surfaces of the first and second wafers.

17. The three-dimensional (3-D) integrated chip system as claimed in claim 15, wherein the flexible bladder press is a hollow steel container including an input valve arranged to input air pressure, and a bottom membrane positioned over the surface of the first wafer to apply the pressure differently at different points on the first wafer as the first wafer is pressed against the second wafer to account for the height differences of the metallic bumps across the opposing surfaces of the first and second wafers.

18. The three-dimensional (3-D) integrated chip system as claimed in claim 15, wherein the pressure required to account for the height differences of the metallic bumps across the opposing surfaces of the first and second wafers is determined based on the following equations:

19. The three-dimensional (3-D) integrated chip system as claimed in claim 15, wherein the first wafer is thinner than the second wafer to conform to the height differences of the metallic bumps across the opposing surfaces of the first and second wafers.

20. The three-dimensional (3-D) integrated chip system as claimed in claim 15, wherein the flexible bladder press is an autoclave including an input valve arranged to input high-pressure gas into a chamber;

a heater arranged to heat the gas at a predetermined temperature; and

at least one vacuum bag arranged to contain the first and second wafers in position for metal bonding.