Chip level hermetic and biocompatible electronics package using SOI wafers

• US 20040155290A1
• Filed: 02/07/2003
• Published: 08/12/2004
• Est. Priority Date: 01/17/2003
• Status: Active Grant

• Current Assignee: Cortigent Incorporated
• Original Assignee: Second Sight Medical Products, Inc.
• Inventors: Greenberg, Robert J., Mech, Brian V., DelMain, Gregory J.
• Granted Patent: US 7,190,051 B2
• Time in Patent Office: Days
• US Class Current: 257/347
• CPC Class Codes: H01L 21/76251 using bonding techniques
• CPC Class Codes: H01L 21/84 the substrate being other than a semiconductor body, e.g. being an insulating body
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688

Abstract

The invention is directed to a hermetically packaged and implantable integrated circuit for electronics that is made my producing streets in silicon-on-insulator chips that are subsequently coated with a selected electrically insulating thin film prior to completing the dicing process to yield an individual chip. A thin-layered circuit may transmit light, allowing a photodetector to respond to transmitted light to stimulate a retina, for example. Discrete electronic components may be placed in the three-dimensional street area of the integrated circuit package, yielding a completely integrated hermetic package that is implantable in living tissue.

Claims

1. An electronics package suitable for implantation in living tissue comprising:

a silicon-on-insulator chip assembly comprised of an insulator substrate and a silicon layer that are bonded together; and

a hermetic electrically insulating thin film that covers said silicon layer.

2. The electronics package according to claim 1 wherein said silicon layer comprises an integrated circuit.

3. The electronics package according to claim 1 wherein said insulator substrate has an exposed area of said insulator substrate that is covered by said hermetic electrically insulating thin film.

4. The electronics package according to claim 1 wherein said hermetic electrically insulating thin film is comprised of alumina.

5. The electronics package according to claim 1 wherein said hermetic electrically insulating thin film is comprised of diamond.

6. The electronics package according to claim 1 wherein said hermetic electrically insulating thin film is biocompatible.

7. The electronics package according to claim 1 said insulator substrate is biocompatible.

8. The electronics package according to claim 1 wherein at least one discrete electronic component is bonded to said insulator substrate and is covered by said hermetic electrically insulating thin film.

9. The electronics package according to claim 8 wherein said at least one discrete electronic component is further comprised of a capacitor.

10. The electronics package according to claim 8 wherein said at least one discrete electronic component is embedded.

11. An electronics package suitable for implantation in living tissue comprising:

a silicon-on-insulator chip assembly comprised of an insulator substrate and a silicon layer that are bonded together;

a hermetic electrically insulating thin film that covers said silicon layer; and

wherein said insulator substrate is transparent to light.

12. The electronics package according to claim 11 wherein said silicon layer contains at least one photoelectric cell that produces an electric impulse when stimulated by electromagnetic radiation.

13. The electronics package according to claim 11 wherein said silicon layer contains at least one photoelectric cell that produces an electric impulse when stimulated by light.

14. The electronics package according to claim 11 wherein said insulator substrate is glass.

15. The electronics package according to claim 11 wherein said insulator substrate is sapphire.

16. The electronics package according to claim 11 wherein said electronics package comprises a neural prosthesis.

17. A method of forming an implantable electronic device, comprising the steps of:

selecting a silicon-on-insulator chip assembly that comprises a silicon layer and an insulator substrate that has a thickness, said silicon layer bonded to said insulator substrate;

making a street that passes through said silicon layer and that passes partially through said thickness of said insulator substrate;

coating said silicon layer and said street with a coating; and

extending said street through said thickness of said insulator substrate.

18. The method according to claim 17, further comprising the steps of:

selecting said insulator substrate that is transparent to electromagnetic radiation; and

mounting at least one photoelectric cell on said insulator substrate to detect said electromagnetic radiation.

19. The method according to claim 17, further comprising the steps of:

selecting a discrete electronic component; and

embedding said discrete electronic component in said insulator substrate.

20. The method according to claim 17, further comprising the steps of:

selecting said coating from the group consisting of diamond,

ultra-nanocrystalline diamond, ceramics, or alumina; and

depositing said coating by ion beam assisted deposition.