Method and circuit arrangement for limiting an overvoltage

• US 20040169975A1
• Filed: 03/10/2004
• Published: 09/02/2004
• Est. Priority Date: 07/10/2002
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Bayerer, Reinhold, Kanschat, Peter, Muenzer, Mark
• Granted Patent: US 7,315,439 B2
• Time in Patent Office: Days
• US Class Current: 361/91.1
• CPC Class Codes: H02H 7/0838 with H-bridge circuit
• CPC Class Codes: H02H 9/047 Free-wheeling circuits
• CPC Class Codes: H02M 1/088 for the simultaneous control of series or parallel connected semiconductor devices
• CPC Class Codes: H02M 1/32 Means for protecting converters other than automatic disconnection
• CPC Class Codes: H03K 17/0828 in composite switches

Abstract

In order to limit an overvoltage at a parallel circuit of IGBT (3) and freewheeling diode (7), an undesirable current spike is used to switch on the intrinsically turned-off IGBT (3′) during the presence of the current spike precisely to an extent such that a current which counteracts the overvoltage arises in the IGBT/freewheeling diode pair. The oppositely acting current reduces the current gradient in leakage inductances (L_σ) and reduces the undesirable induced overvoltages.

Claims

1. A method for limiting an overvoltage at a freewheeling device arranged in parallel with a semiconductor power switch, wherein at least a first and a second semiconductor power switch each parallel-connected with a freewheeling device are connected in series, and an output terminal to an inductive load is arranged between the two, the method comprising the steps of:

controlling one of the semiconductor power switches into the turned-off state and the other one into the non-turned-off state,

switching the turned-off semiconductor power switch, at least at the instant of the occurrence of an overvoltage at the associated freewheeling device or during the decay of a current spike, temporarily on to such an extent that a short-time current is generated at the output of the semiconductor power switch.

2. The method as claimed in claim 1, wherein the semiconductor power switch used is an IGBT or MOS power transistor, and the gate terminal and the emitter terminal are connected to one another with high impedance in the case of the intrinsically turned-off IGBT, as a result of which a short-time switch-on of the semiconductor power switch is achieved when a current spike occurs.

3. The method as claimed in claim 1, wherein the control terminal of the turned-off semiconductor power switch has applied to it a voltage pulse of predetermined duration and amplitude in a manner temporally coordinated with the occurrence of a current spike at the freewheeling device.

4. The method as claimed in claim 1, wherein the control terminal of the turned-off semiconductor power switch has applied to it a stepped voltage pulse of predetermined short time duration in a manner temporally coordinated with the occurrence of a current spike.

5. The method as claimed in claim 1, wherein the voltage at the freewheeling device is fed back via a feedback path to the control terminal of the turned-off semiconductor power switch, as a result of which the turned-off semiconductor power switch is momentarily and at least partially switched on during the voltage spike.

6. The method as claimed in claim 1, wherein the current gradient in the freewheeling device is fed back via a further feedback path to the control terminal of the turned-off semiconductor power switch in such a way that the turned-off semiconductor switch is momentarily and at least partially switched on during the current spike.

7. A circuit arrangement for limiting an overvoltage at a freewheeling device arranged in parallel with a semiconductor power switch, comprising at least a first and a second semiconductor power switch each parallel-connected with a freewheeling device being connected in series, an output terminal arranged between the first and second semiconductor power switch for coupling with to an inductive load, and a feedback path between the output of each semiconductor power switch and its control terminal.

8. The circuit arrangement as claimed in claim 7, wherein the feedback path has at least one component, which permits a driving of the control terminal only above a threshold voltage, so that only voltages greater than a predetermined threshold value are fed back to the control terminal.

9. The circuit arrangement as claimed in claim 7, wherein the feedback path has a component, via which a feedback to the control terminal is effected in a manner proportional to the voltage rise at the freewheeling device.

10. The circuit arrangement as claimed in claim 7, wherein two zener diodes connected in antiparallel are used as the components in the feedback path.

11. The circuit arrangement as claimed in claim 7, wherein a capacitor is used as the component in the feedback path.

12. The circuit arrangement as claimed in claim 7, wherein a parallel circuit comprising zener diodes and an external capacitor is used in the feedback path.

16. The circuit arrangement as claimed in claim 7, wherein an IGBT power transistor is used as the semiconductor power switch.

13. A circuit arrangement for limiting an overvoltage at a freewheeling device arranged in parallel with a semiconductor power switch, comprising at least a first and a second semiconductor power switch each parallel-connected with a freewheeling device being connected in series, an output terminal arranged between the first and second semiconductor power switch for coupling with to an inductive load, wherein a feedback path is provided between the input and control terminal of a power driver, the feedback path being designed such that it permits the control terminal to be driven up only above a threshold value of the current gradient through the freewheeling device.

14. The circuit arrangement as claimed in claim 13, wherein the voltage drop across internal and/or external leakage inductances is utilized for the feedback.

15. The circuit arrangement as claimed in claim 13, wherein the current rise is fed back through the induction in a transformer.