Method of attaching a die to a substrate

• US 20040178511A1
• Filed: 03/29/2004
• Published: 09/16/2004
• Est. Priority Date: 03/04/2002
• Status: Active Grant

• Current Assignee: North Star Innovations Inc. (Wi-LAN Inc.)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Ho, Wai Keung, Chow, Wai Wong, Cheng, Man Hon
• Granted Patent: US 6,875,635 B2
• Time in Patent Office: Days
• US Class Current: 257/783
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/29015 comprising protrusions or indentations
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 23/49513 having bonding material between chip and die pad
• CPC Class Codes: H01L 24/29 of an individual layer connector
• CPC Class Codes: H01L 24/32 of an individual layer connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/00015 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art
• CPC Class Codes: H01L 2924/01067 Holmium [Ho]
• CPC Class Codes: H01L 2924/01327 Intermediate phases, i.e. intermetallics compounds
• CPC Class Codes: H01L 2924/10253 Silicon [Si]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/207 : Diameter ranges

Abstract

A semiconductor device 30 includes a base carrier 32, an adhesive material layer 36 and an integrated circuit die 34. The base carrier 32 has a top side and a bottom side, the top side having a central area for receiving the die 34 and a peripheral area surrounding the central area. The adhesive material layer 36 is disposed on the top side of the base carrier in an “X” shaped pattern. The “X” shaped pattern includes two bisecting lines. The two bisecting lines extend well beyond the central area and into the peripheral area of the base carrier top surface. The die 34 is attached to the base carrier 32 with the adhesive material layer 36 at the central area. Even after attachment of the die 34, the adhesive material 36 extends well beyond the die 34 and the central area into the peripheral area.

Claims

1. A semiconductor device, comprising:

a base carrier having a top side and a bottom side, the top side having a central area for receiving an integrated circuit die and a peripheral area;

an extended adhesive material layer disposed on the top side of the base carrier, the adhesive material layer covering the central area and a large portion of the peripheral area of the base carrier top surface; and

an integrated circuit die attached to the base carrier with the adhesive material layer at the central area.

2. The semiconductor device of claim 1, wherein the base carrier comprises a paddle.

3. The semiconductor device of claim 2, further comprising a leadframe to which bonding pads of the integrated circuit device are electrically connected.

4. The semiconductor device of claim 3, further comprising an encapsulant surrounding the base carrier, the integrated circuit die and at least a portion of the leadframe.

5. The semiconductor device of claim 3, wherein the device is an exposed pad type packaged device.

6. A semiconductor device, comprising:

a base carrier having a top side and a bottom side., the top side having a central area for receiving an Integrated circuit die and a peripheral area;

an adhesive material layer disposed on the top side of the base carrier, wherein the adhesive material layer is dispensed on the top side of the base carrier in an “

X”

shaped pattern, the “

X”

shaped pattern including two bisecting lines, wherein the two bisecting lines extend beyond the central area and into the peripheral area of the base carrier top surface; and

an integrated circuit die attached to the base carrier with the adhesive material layer at the central area.

7. The semiconductor device of claim 6, wherein the “

X”

shaped pattern of adhesive material further includes a first line extending from a middle part of the peripheral area of a first side of the base carrier to a middle part of the peripheral area of a second, opposing side of the base carrier such that the adhesive material layer forms a six pointed star.

8. The semiconductor device of claim 7, wherein the “

X”

shaped pattern of adhesive material further includes a second line extending from a middle part of the peripheral area of a third side of the base carrier to a middle part of the peripheral area of a fourth, opposing side of the base carrier such that the adhesive material layer forms an eight pointed star.

9. The semiconductor device of claim 6, wherein the base carrier comprises a paddle.

10. The semiconductor device of claim 9, further comprising a leadframe to which bonding pads of the integrated circuit device are electrically connected.

11. The semiconductor device of claim 10, further comprising an encapsulant surrounding the base carrier, the integrated circuit die and at least a portion of the leadframe.

12. The semiconductor device of claim 10, wherein the semiconductor device comprises an exposed pad type packaged device.

13. A method of attaching an integrated circuit die to a base carrier comprising the steps of:

dispensing an adhesive material onto a central area of a top surface of the base carrier, wherein the central area is sized to receive the integrated circuit die and the central area is surrounded by a peripheral area; and

attaching a bottom surface of the integrated circuit die to the central area on the top surface of the base carrier with the adhesive material, wherein the adhesive material dispensed onto the top surface of the base carrier extends well into the peripheral area of the base carrier top surface.

14. The method of attaching an integrated circuit die to a base carrier of claim 13, wherein the dispensed adhesive material covers substantially the entire top surface of the base carrier.

15. The method of attaching an integrated circuit die to a base carrier of claim 13, wherein the adhesive material is dispensed onto the base carrier top surface in a predetermined pattern.

16. The method of attaching an integrated circuit die to a base carrier of claim 15, wherein the predetermined pattern comprises an “

X”

pattern.

17. The method of attaching an integrated circuit die to a base carrier of claim 15, wherein the predetermined pattern comprises a six point star pattern.

18. The method of attaching an integrated circuit die to a base carrier of claim 15, wherein the predetermined pattern comprises an eight point star pattern.