Method of providing an interface to a plurality of peripheral devices using bus adapter chips
First Claim
1. A method of electrically coupling a central processing unit (CPU) of a server to a plurality of interface modules comprising:
- routing an I/O bus having a first format from said central processing unit to primary sides of a plurality of bus adapter chips; and
routing an I/O bus of said first format from secondary sides of said bus adapter chips to respective ones of said interface modules.
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Accused Products
Abstract
A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network interface modules with a respective bus adapter chip to route an I/O bus having a first format from the central processing unit to a primary side of each of the plurality of bus adaptor chips and routing another I/O bus of the first format from a secondary side of each of the plurality of bus adapter chips to respective ones of the network interface modules. The bus adapter chips also provide for arbitered access along the I/O buses and isolation of the CPU from electrical disruption when one the network interface modules is removed.
103 Citations
20 Claims
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1. A method of electrically coupling a central processing unit (CPU) of a server to a plurality of interface modules comprising:
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routing an I/O bus having a first format from said central processing unit to primary sides of a plurality of bus adapter chips; and
routing an I/O bus of said first format from secondary sides of said bus adapter chips to respective ones of said interface modules. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of electrically coupling a plurality of interface modules to a CPU such that at least one of the interface modules can be disconnected without powering down the remaining interface modules or the CPU, said method comprising:
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mounting a CPU on a chassis;
removably mounting a plurality of interface modules to said chassis;
mounting a backplane printed circuit board on the chassis, wherein the backplane printed circuit board comprises at least one bus adapter chip for each of the plurality of interface modules, and wherein each bus adapter chip has a primary side and a secondary side, and wherein each bus adapter chip has electrical hardware that isolates the primary side from the secondary side when the corresponding interface module has been removed from the chassis;
routing an I/O bus on said backplane printed circuit board from the primary side of the at least one bus adapter chip to the CPU; and
routing an I/O bus on said backplane printed circuit board from the secondary side of the at least one bus adapter chip to the corresponding one of the interface modules. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A method of electrically coupling a plurality of interface modules to a CPU such that at least one of the interface modules can be removed without powering down the remaining interface modules or the CPU, said method comprising:
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mounting a backplane printed circuit board on the back of a chassis;
connecting a CPU module to said backplane printed circuit board when mounting a CPU module on said chassis; and
removably mounting a plurality of interface modules to the backplane printed circuit board; and
connecting the plurality of interface modules to the backplane printed circuit board with bus adapter chips configured to proved arbitrated access to said interface modules and electrical termination and isolation between the interface modules and the CPU module when a interface module is removed. - View Dependent Claims (14, 15)
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16. A system for electrically coupling a central processing unit (CPU) of a server to a plurality of interface modules, the system comprising:
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means routing an I/O bus having a first format from said central processing unit to primary sides of a plurality of bus adapter chips; and
means for routing an I/O bus of said first format from secondary sides of said bus adapter chips to respective ones of said interface modules. - View Dependent Claims (17, 18, 19, 20)
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Specification