Systems and methods for power conservation in a CMOS imager

• US 20040233324A1
• Filed: 04/06/2004
• Published: 11/25/2004
• Est. Priority Date: 05/29/2001
• Status: Active Grant

• Current Assignee: Transchip Israel Limited
• Original Assignee: TransChip, Inc. (Samsung Electronics Co. Ltd.), Transchip Israel Research Center Limited
• Inventors: Furman, Ben, Fraenkel, Miriam, Galambos, Tiberiu
• Granted Patent: US 7,738,013 B2
• Time in Patent Office: Days
• US Class Current: 348/372
• CPC Class Codes: H04N 23/651 for reducing power consumption by affecting camera operations, e.g. sleep mode, hibernation mode or power off of selective parts of the camera
• CPC Class Codes: H04N 25/134 based on three different wavelength filter elements
• CPC Class Codes: H04N 25/709 Circuitry for control of the power supply

Abstract

The present invention provides systems and methods capable of reducing power consumption in an imaging device. One imaging device includes two analog to digital converters that are separately programmable and can be in different power modes. Each digital to analog converter is capable of creating an image derived from a pixel array that has a full field of view, but lower resolution.

Claims

1. An imaging system for electronically capturing optical images, wherein the imaging system comprises:

a pixel array, wherein the pixel array comprises;

a first pixel group, wherein the first pixel group is associated with a first portion of an optical image and is associated with a first signal, and

a second pixel group, wherein the second pixel group is associated with a second portion of the optical image and is associated with a second signal;

a first analog processing path, comprising a first analog to digital converter, wherein;

the first analog processing path converts the first signal to a first digital signal, and

the first analog processing path operates in a first power mode; and

a second analog processing path, comprising a second analog to digital converter, wherein;

the second analog processing path converts the second signal to a second digital signal,

the second analog processing path operates in a second power mode, and

the first power mode consumes more power than the second power mode.

2. The imaging system for electronically capturing optical images as recited in claim 1, further comprising one or more additional analog processing paths.

3. The imaging system for electronically capturing optical images as recited in claim 1, wherein the first analog to digital converter can be programmed to perform in the first mode, and at the same time, the second analog to digital converter can be programmed to perform in the second mode.

4. The imaging system for electronically capturing optical images as recited in claim 1, wherein the imaging system further comprises a programmable control network operable to place the first analog to digital converter the first mode, and to place the second analog to digital converter in the second mode.

5. The imaging system for electronically capturing optical images as recited in claim 1, wherein the imaging system further comprises a digital processing system, wherein the digital processing system processes at least one of the first group of digital electrical signals and the second group of digital electrical signals to form a unified digital image.

6. The imaging system for electronically capturing optical images as recited in claim 1, wherein the second analog to digital converter consumes no more than sixty percent of an amount of power when the second analog to digital converter is in the second mode as compared to the amount of power consumed by the second analog to digital converter when the second analog to digital converter is in the first mode.

7. The imaging system for electronically capturing optical images as recited in claim 1, wherein a digital image produced by the imaging system in the second mode is one quarter a maximum size.

8. The imaging system for electronically capturing optical images as recited in claim 1, wherein a digital image produced by the imaging system in the second mode is reduced from a maximum size.

9. The imaging system for electronically capturing optical images as recited in claim 1, wherein a digital image produced by the imaging system is digitally sub-sampled in one of the horizontal or vertical direction.

10. The imaging system for electronically capturing optical images as recited in claim 1, wherein:

a predetermined mode decreases resolution of images produced by the imaging system, and

a clock to one of the first and second analog to digital converters is reduced in the predetermined mode.

11. The imaging system for electronically capturing optical images as recited in claim 1, wherein the first analog to digital converter, the second analog to digital converter, and the pixel array are implemented on a single CMOS chip.

12. A method for image acquisition with a CMOS imaging array, the method comprising steps of:

generating a first analog signal representative of a first rectangular subset of pixels from the CMOS imaging array, wherein the first rectangular subset of pixels includes a first plurality of pixels;

converting the first signal into first digital data representative of the first signal;

generating a second analog signal representative of a second rectangular subset of pixels from the CMOS imaging array, wherein the second rectangular subset of pixels includes a second plurality of pixels; and

selectively converting the second analog signal into second digital data representative of the second analog signal when a power mode is selected.

13. The method for image acquisition with the CMOS imaging array of claim 12, wherein the first group of digital signals forms a full color portion of a processed image corresponding to the image.

14. The method for image acquisition with the CMOS imaging array of claim 12, wherein geometric dimensions for the first rectangular subset of pixels is equal to those of the second rectangular subset.

15. The method for image acquisition with the CMOS imaging array of claim 12, further comprising a step of generating a third analog signal representative of a third rectangular subset of pixels from the CMOS imaging array, wherein the third rectangular subset of pixels includes a third plurality of pixels.

16. The method for image acquisition with the CMOS imaging array of claim 12, wherein the first rectangular subset of pixels includes a plurality of pixels in a horizontal axis and a plurality of pixels in a vertical axis.

17. The method for image acquisition with the CMOS imaging array of claim 12, wherein a size of the first rectangular subset is reduced in another power mode.

18. An imaging system for electronically capturing optical images, the imaging system comprising:

a pixel array, wherein the pixel array comprises a first pixel and a second pixel, wherein the first pixel provides a first analog electrical signal associated with a first portion of an image, and wherein the second pixel provides a second analog signal associated with a second portion of the image;

a first analog to digital converter, wherein the first analog to digital converter converts the first analog electrical signal to a first digital electrical signal; and

a second analog to digital converter, wherein;

the second analog to digital converter converts the second analog electrical signal to a second digital electrical signal, and

the second analog to digital converter is put into a reduced power mode when the first analog to digital converter is not in the reduced power mode.

19. The imaging system for electronically capturing optical images as recited in claim 18, further comprising a plurality of analog to digital converters that respectively covert a plurality of pixels in the pixel array.

20. The imaging system for electronically capturing optical images as recited in claim 18, wherein an optical image is produced in the reduced power mode with full field of view, but with reduced resolution.