Patterned thin film graphite devices and method for making same

• US 20040253820A1
• Filed: 06/03/2004
• Published: 12/16/2004
• Est. Priority Date: 06/12/2003
• Status: Active Grant

• Current Assignee: Georgia Tech Research Corporation (University System of Georgia)
• Original Assignee: Georgia Tech Research Corporation (University System of Georgia)
• Inventors: DeHeer, Walt A., Berger, Claire, First, Phillip N.
• Granted Patent: US 7,015,142 B2
• Time in Patent Office: Days
• US Class Current: 438/689
• CPC Class Codes: H01L 21/0405 the devices having semiconductor bodies comprising semiconducting carbon, e.g. diamond, diamond-like carbon multistep processes for the manufacture of said devices H01L29/66015
• CPC Class Codes: H01L 21/0445 the devices having semiconductor bodies comprising crystalline silicon carbide multistep processes for the manufacture of said devices H01L29/66053
• CPC Class Codes: H01L 29/16 including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 29/1606 Graphene
• CPC Class Codes: H01L 29/772 Field effect transistors
• CPC Class Codes: H01L 29/7781 with inverted single heterostructure, i.e. with active layer formed on top of wide bandgap layer, e.g. IHEMT
• CPC Class Codes: Y10S 438/931 Silicon carbide semiconductor

Abstract

In a method of making graphite devices, a preselected crystal face of a crystal is annealed to create a thin-film graphitic layer disposed against selected face. A preselected pattern is generated on the thin-film graphitic layer. A functional structure includes a crystalline substrate having a preselected crystal face. A thin-film graphitic layer is disposed on the preselected crystal face. The thin-film graphitic layer is patterned so as to define at least one functional structure.

Claims

1. A method of making graphite devices, comprising the steps of:

a. creating on a preselected face of a substrate, a thin-film graphitic layer disposed against preselected face; and

b. generating a preselected pattern on the thin-film graphitic layer.

2. The method of claim 1, wherein the substrate comprises a crystal and wherein the preselected face comprises a preselected crystal face.

3. The method of claim 2, wherein the crystal comprises silicon carbide.

4. The method of claim 3, wherein the silicon carbide crystal comprises a 6H crystal.

5. The method of claim 3, wherein the silicon carbide crystal comprises a 4H crystal.

6. The method of claim 3, wherein the silicon carbide crystal comprises a 3C crystal.

7. The method of claim 2, wherein the preselected crystal face corresponds to a [0001] crystal orientation.

8. The method of claim 2, wherein the preselected crystal face corresponds to a [0001] crystal orientation.

9. The method of claim 1, wherein the thin-film graphitic layer includes a graphene strip.

10. The method of claim 1, wherein the thin-film graphitic layer includes a graphite strip.

11. The method of claim 2, further comprising the step of flattening the preselected crystal face prior to the creating step.

12. The method of claim 11, wherein the flattening step comprises the step of exposing the preselected crystal face to a reactive gas at a first temperature and first flow pressure for a first amount of time sufficient to remove surface irregularities from the preselected crystal face.

13. The method of claim 12, wherein the first temperature is substantially 1500°

C.

14. The method of claim 12, wherein the reactive gas comprises 5% hydrogen gas in argon gas and wherein the first flow rate is substantially 200 SCCM.

15. The method of claim 12, wherein the first amount of time is substantially 20 minutes.

16. The method of claim 2, wherein the creating step comprises annealing.

17. The method of claim 16, wherein the annealing step comprises the step of heating the preselected crystal face to a second temperature at a second pressure and for a second amount of time sufficient so that the thin-film graphitic layer forms on the preselected crystal face

18. The method of claim 16, wherein the second temperature is in a range of 1000°

C. to 1400°

C.

19. The method of claim 16, wherein the second pressure is below 10⁻

4 Torr.

20. The method of claim 16, wherein the second amount of time is substantially 20 minutes.

21. The method of claim 2, wherein the annealing step comprises electron beam heating of the preselected crystal face at a pressure of substantially 10⁻

10 Torr for between 1 minute and 20 minutes.

22. The method of claim 2, wherein the step of generating a preselected pattern on the thin-film graphitic layer comprises the steps of:

a. applying a mask to the thin-film graphitic layer, the mask including at least one non-masking region in which a first portion of the thin-film graphitic layer is exposed to an environment and at least one masking region in which a second portion, different from the first portion, of the thin-filn graphitic layer is not exposed to an environment; and

b. releasing a reactive substance into the environment, the reactive substance reactive with graphite, so that the reactive substance removes graphite from the thin-film graphitic layer in the region of the first portion,

the first portion and the second portion selected so as to form a functional structure in the thin-film graphitic layer.

23. The method of claim 22, wherein the reactive substance comprises an ionic plasma.

24. The method of claim 23, wherein the ionic plasma comprises an oxygen plasma.

25. The method of claim 22, wherein the step of applying the mask comprises the steps of:

a. applying a photo-resist to the thin-film graphitic layer;

b. applying a pattern corresponding to a desired functional structure to the photo-resist, the pattern including a first region that is translucent to a predetermined electromagnetic energy and a second region, different from the first region, that is opaque to the predetermined electromagnetic energy;

c. exposing the pattern to the predetermined electromagnetic energy; and

d. developing the photo-resist so as to remove undesired portions of the photo-resist, thereby creating the mask so as to correspond to the functional structure.

26. The method of claim 2, wherein the step of generating a preselected pattern on the thin-film graphitic layer comprises the steps of:

a. applying a mask to the crystal face, the mask including at least one non-masking region in which a first portion of the crystal face is exposed to an environment and at least one masking region in which a second portion, different from the first portion, of the crystal face is not exposed to an environment;

b. exposing the mask to the environment; and

c. releasing a reactive substance into the environment, the reactive substance reactive with crystal, so that the reactive substance removes a portion of the crystal face in the region of the first portion,

the first portion and the second portion selected so as to form an image of a functional structure in the crystal face and so that graphite forms on lateral surfaces of the crystal face during the annealing step.

27. The method of claim 1, wherein the substrate comprises an insulator.

28. A functional structure, comprising:

a. a crystalline substrate having a preselected crystal face; and

b. a thin-film graphitic layer disposed on the preselected crystal face, the thin-film graphitic layer patterned so as to define at least one functional structure.

29. The functional structure of claim 28, wherein the crystalline substrate comprises silicon carbide.

30. The functional structure of claim 28, wherein the substrate comprises an insulator.

31. The functional structure of claim 28, wherein the thin-film graphitic layer has a nano-scale thickness.

32. The functional structure of claim 28, wherein the thin-film graphitic layer comprises a graphene strip.

33. The functional structure of claim 32, wherein the graphene strip includes an edge that is functionalized with a dopant.

34. The functional structure of claim 28, wherein the thin-film graphitic layer comprises a graphite strip.

35. The functional structure of claim 32, wherein the graphite strip includes an edge that is functionalized with a dopant.

36. The functional structure of claim 28, wherein the thin-film graphitic layer is patterned to form an electronic device.

37. The functional structure of claim 32, wherein the electronic device comprises a transistor.

38. The functional structure of claim 37, wherein the transistor comprises:

a. a graphite source member;

b. a graphite drain member, spaced apart from the source member;

c. a graphite connector, in electrical communication with both the source member and the drain member; and

d. a gate portion spaced apart from the connector at a distance such that an electron transport property of the connector changes when charge is applied to the gate portion so as to induce a field that interacts with the connector.

39. The functional structure of claim 32, wherein the electronic device comprises a logic gate.

40. The functional structure of claim 32, wherein the electronic device comprises a logic directional coupler.

41. The functional structure of claim 32, wherein the electronic device comprises an interferometer.

42. The functional structure of claim 41, wherein the interferometer comprises:

a. a source member;

b. a drain member;

c. a loop-like structure, having a first branch and a spaced-apart second branch, in electrical communication with the source member and with the drain member;

d. at least one gate member disposed adjacent to the first branch, that is capable of exerting an electrical field substantially only on the first branch; and

e. a sensor that can sense interference between electrons passing through the first branch and electrons passing through the second branch.

43. The functional structure of claim 42, wherein a portion of a selected one of the first branch and the second branch comprises a functionalizing dopant.

44. The functional structure of claim 41, wherein the interferometer comprises a Mach-Zender device.

45. An active electronic device, comprising:

a. a first electron source area;

b. a first electron target area, spaced apart from the electron source area;

c. a substantially flat graphitic strip that is in electronic communication with the electron source area and the electron target area, the graphitic strip having at least one dimension that includes less than one hundred graphene layers;

d. a first gate area, disposed relative to a first portion of the graphitic strip so that when electronic charge is applied to the first gate area, a field is generated that affects an electron transport quality through the first portion of the graphitic strip.

46. The active electronic device of claim 45, wherein the graphitic strip has a plurality of preselected molecules attached thereto, the preselected molecules capable of reacting to a target substance so that if the target substance is present in an environment a change in current flow through the graphitic strip will occur when the graphitic strip is exposed to the environment.

47. The active electronic device of claim 45, wherein the graphitic strip comprises a single graphene layer.

48. The active electronic device of claim 45, wherein the first gate area and the graphitic strip are substantially coplanar.

49. The active electronic device of claim 45, wherein the first gate area and the graphitic strip are in a substantially stacked relationship.

50. The active electronic device of claim 45, wherein the field is an electric field.

51. The active electronic device of claim 45, wherein the field is a magnetic field.

52. The active electronic device of claim 45, wherein the graphitic strip comprises a loop portion that includes a first branch and a second branch, the second branch diverting from the first branch at a first location and rejoining the first branch at a second location, spaced apart from the first location, the gate area disposed relative to the first branch and the second branch so that a field generated at the gate area affects the electron transport quality through the first branch in a first manner and in the second branch in a second manner, different from the first manner.

53. The active electronic device of claim 52, further comprising at least one second gate area, spaced apart from the first gate area, and disposed relative to a second portion of the graphitic strip so that when electronic charge is applied to the second gate area, a field is generated that affects an electron transport quality through the second portion of the graphitic strip.

54. The active electronic device of claim 53, wherein the first portion and the second portion are both disposed on the first branch.

55. The active electronic device of claim 53, wherein the first portion is disposed on the first branch and the second portion is disposed on the second branch.

56. The active electronic device of claim 52, wherein a selected one of the first branch and the second branch is functionalized so that the active electronic device functions as an interferometric sensor.

57. The active device of claim 52, wherein a magnetic field affects the electron transport quality.

58. The active electronic device of claim 45, wherein the first electron source area and the first electron target area each include a graphitic surface, the device further comprising:

a. a second electron source area including a graphitic surface; and

b. a second electron target area including a graphitic surface,

wherein a selected one of the first electron source area and the first electron target area is electrically coupled to a selected one of the second electron source area and the second electron target area via a graphitic surface.

59. The active electronic device of claim 45, wherein the first electron source area and the first electron target area each include a graphitic surface, the device further comprising:

a. a second electron source area including a graphitic surface;

b. a second electron target area including a graphitic surface; and

c. a second gate area including a graphitic surface,

wherein selected ones of the fist electron source area, the target area, and the gate area are electrically coupled to selected ones of the second electron source area, target area, and gate area via a graphitic surface.