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Interlaced protocol for smart card application development

  • US 20050022169A1
  • Filed: 08/16/2004
  • Published: 01/27/2005
  • Est. Priority Date: 05/11/1999
  • Status: Active Grant
First Claim
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1. An integrated circuit (IC) card comprising:

  • an input/output (I/O) interface; and

    a smart card development interface, coupled to the I/O interface, to receive and identify one or more debug frames interlaced within a normal communication flow between the IC card and a host system.

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