Fast settling power amplifier regulator

• US 20050024145A1
• Filed: 03/31/2004
• Published: 02/03/2005
• Est. Priority Date: 12/03/2002
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Dupuis, Timothy J., Bocock, Ryan M.
• Granted Patent: US 7,173,491 B2
• Time in Patent Office: Days
• US Class Current: 330/285
• CPC Class Codes: H03F 1/0211 with control of the supply voltage or current
• CPC Class Codes: H03F 1/0216 Continuous control
• CPC Class Codes: H03F 1/0261 with control of the polarisation voltage or current, e.g. gliding Class A
• CPC Class Codes: H03F 2200/471 the voltage being sensed
• CPC Class Codes: H03F 2200/504 the supply voltage or current being continuously controlled by a controlling signal, e.g. the controlling signal of a transistor implemented as variable resistor in a supply path for, an IC-block showed amplifier
• CPC Class Codes: H03G 3/3042 in modulators, frequency-changers, transmitters or power amplifiers transmission power control in bidirectional transmission systems H04W52/04
• CPC Class Codes: H03G 3/3047 for intermittent signals, e.g. burst signals

Abstract

A method and apparatus is provided for dynamically changing the biasing conditions of a voltage regulator to overcome the problems caused by various conditions. The invention includes a detector and a bias control circuit for applying bias current to the voltage regulator to compensate for a detected condition.

Claims

1. A circuit for regulating the output power of a power amplifier during a switching transient comprising:

a detector circuit coupled to a regulator and to a control signal that is generated to control the output power of the power amplifier, wherein the detector circuit detects switching transients of the power amplifier; and

a circuit coupled to the regulator for applying a signal to decrease the settling time of the regulator during a detected switching transient.

2. The circuit of claim 1, further comprising a timer circuit coupled to the bias circuit and the detector circuit for controlling when the signal is applied to the regulator.

3. The circuit of claim 2, wherein the timer is a pulse generator.

4. The circuit of claim 2, wherein the timer is a 1-shot timer.

5. The circuit of claim 1, wherein the detector detects when the voltage level of the voltage control signal drops.

6. The circuit of claim 1, wherein the detector is comprised of a slew detector.

7. The circuit of claim 1, wherein the circuit decreases the settling time of the regulator by applying a bias current to the regulator.

8. The circuit of claim 1, wherein the circuit decreases the settling time of the regulator by applying a bias voltage to the regulator.

9. The circuit of claim 1, further comprising a second regulator, wherein the circuit decreases the settling time of the regulator by selectively using the first and second regulators.

10. The circuit of claim 1, further comprising a switching device coupled to the detector, wherein the circuit decreases the settling time of the regulator by turning on the switching device in response to a detected condition.

11. The circuit of claim 10, wherein the switching device is coupled to a bias circuit and the regulator for biasing the regulator while the switching device is turned on.

12. A circuit for regulating the output power of a power amplifier during a switching transient comprising:

a regulator;

a detector for detecting a condition relating to the operation of the regulator; and

control circuitry coupled to the regulator for decreasing the settling time of regulator in response to a detected condition.

13. The circuit of claim 12, further comprising a timer coupled to the detector and the control circuitry for controlling the duration that the control circuitry controls the output power of the regulator in response to a detected condition.

14. The circuit of claim 13, further comprising delay circuitry for delaying when the control circuitry controls the output power of the regulator in response to a detected condition.

15. The circuit of claim 12, wherein the output level of the regulator is controlled by a power control signal, and wherein the detector detects a condition relating to the power control signal.

16. The circuit of claim 15, wherein the detector detects when the power control signal level drops.

17. The circuit of claim 12, wherein the control circuitry varies the speed at which the regulator is able to respond to a detected condition.

18. The circuit of claim 17, wherein the regulator is dynamically biased in response to a detected condition.

19. The circuit of claim 12, wherein the control circuitry varies the method by which the regulator controls the output power of the power amplifier in response to a detected condition.

20. The circuit of claim 19, further comprising switching circuitry for selectively activating two or more regulators in response to a detected condition.

21-48. -48. (canceled)