Multi-application transponder circuit and memory management method for the same

• US 20050040244A1
• Filed: 07/12/2004
• Published: 02/24/2005
• Est. Priority Date: 07/14/2003
• Status: Active Grant

• Current Assignee: EM Microelectronic - Marin SA (The Swatch Group AG)
• Original Assignee: EM Microelectronic - Marin SA (The Swatch Group AG)
• Inventors: Kanan, Riad
• Granted Patent: US 7,275,127 B2
• Time in Patent Office: Days
• US Class Current: 235/492
• CPC Class Codes: G06K 19/073 Special arrangements for circuits, e.g. for protecting identification code in memory protection against unauthorised use of computer memory G06F12/14
• CPC Class Codes: G06Q 20/341 Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
• CPC Class Codes: G06Q 20/35765 Access rights to memory zones
• CPC Class Codes: G07F 7/1008 Active credit-cards provided with means to personalise their use, e.g. with PIN-introduction/comparison system

Abstract

There is disclosed a multi-application transponder circuit for a contactless electronic identification and/or access system including, in particular, a non-volatile memory (18) having a segmented programmable memory space for receiving data relating to a plurality of distinct applications, this memory space including (i) a first memory zone (A) segmented into several memory words each dedicated to storage of data relating to a determined application from among said plurality of distinct applications, (ii) a second memory zone (B), called a shared zone, segmented into several memory words each able to be allocated to storage of data relating to any application from among said plurality of distinct applications, and (iii) a third memory zone (C) containing indications relating to the allocation of memory words of said second memory zone, at least, and for determining which memory word or words of said second memory zone are allocated to storage of data relating to a given application from among said plurality of distinct applications. There is also disclosed a memory management method for such a transponder circuit.

Claims

1. A multi-application transponder circuit for a contactless electronic identification and/or access system including, in particular, a non-volatile memory having a segmented programmable memory space for receiving data relating to a plurality of distinct applications, this memory space including:

a first memory zone segmented into several memory words each dedicated to storage of data relating to a determined application from among said plurality of distinct applications;

a second memory zone, called a shared zone, segmented into several memory words each able to be allocated to storage of data relating to any application from among said plurality of distinct applications; and

a third memory zone containing indications relating to the allocation of memory words of said second memory zone, at least, and for determining which memory word or words of said second memory zone are allocated to storage of data relating to a given application from among said plurality of distinct applications.

2. The transponder circuit according to claim 1, wherein a first part of said third memory zone identifies the allocation of memory words of said first memory zone and wherein a second part of said third memory zone identifies the allocation of memory words of said second memory zone.

3. The transponder circuit according to claim 2, wherein the allocation of memory words of said first memory zone is pre-established and stored in said first part of the third memory zone and in that the allocation of memory words of the second memory zone is variable as a function of the needs of each application and is capable of being updated by modifying the indications stored in said second part of the third memory zone.

4. The transponder circuit according to claim 1, wherein the allocation of a memory word to an application is determined by a single bit whose state indicates whether the memory word considered is or is not allocated to the corresponding application.

5. The transponder circuit according to claim 4, wherein said second memory zone includes n memory words each able to be allocated to storage of data relating to any application among said plurality of distinct applications,

and wherein said third memory zone is organised such that for each application there is a corresponding allocation word including at least n bits each representative of the allocation to the application concerned of said n memory words of the second memory zone.

6. The transponder circuit according claim 1, wherein at least one of said memory words is shared between various applications.

7. The transponder circuit according to claim 1, wherein a state bit representative of the occupation or non-occupation of the memory word is associated with each memory word of said first and second memory zones.

8. In a transponder circuit according to claim 1, memory management method for said transponder circuit including:

a) during a read operation of data relating to a determined application from among said plurality of distinct applications;

a search step in said third memory zone for the memory words of said second memory zone, at least, which are allocated to said determined application, and

a step for reading in said first memory zone and, possibly in said second memory zone binary words allocated to said determined application.

b) during a modified data storage operation relating to a determined application from among said plurality of distinct applications;

a step for determining the number of memory words necessary for storing the modified data;

if the number of memory words necessary for storing the modified data is less than or equal to the number of memory words already allocated to said determined application;

a step for storing modified data in the memory words already allocated;

or, in the opposite case;

a step for allocating one or several memory words of said second memory zone to the determined application;

a step for updating the allocation indications stored in said third memory zone; and

a step for storing modified data in the allocated memory words of said first and second memory zones.

9. The method according to claim 8, wherein it includes, during an operation for erasing data contained in a memory word of said second memory zone which is allocated to a determined application from among said plurality of distinct applications:

an erasure step, in said third memory zone, of the allocation indications relating to said memory word of the second memory zone such that this memory word can subsequently be allocated to another application from among said plurality of distinct applications.

10. The method according to claim 9, wherein the allocation indications relating to the memory words of said first memory zone, which are allocated to a determined application from among said plurality of distinct applications can only be erased from said third memory zone during an operating for erasing all of the data relating to said determined application.

11. The method according to claim 8, wherein it further includes, during an operation for storing data in a new memory word or during an operation for erasing all of the data contained in a memory word, a step for updating the state bit associated with the memory word concerned.