RFIC die-package configuration

• US 20050093132A1
• Filed: 11/05/2003
• Published: 05/05/2005
• Est. Priority Date: 11/05/2003
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Khorram, Shahla
• Granted Patent: US 6,998,709 B2
• Time in Patent Office: Days
• US Class Current: 257/698
• CPC Class Codes: H01L 21/52 Mounting semiconductor bodies in containers
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device antennas per se H01Q
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/16235 the bump connector connecting to a via metallisation of the item
• CPC Class Codes: H01L 23/48 Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/3011 Impedance
• CPC Class Codes: H05K 1/0243 Printed circuits associated with mounted high frequency components
• CPC Class Codes: H05K 1/16 incorporating printed electric components, e.g. printed resistor, capacitor, inductor
• CPC Class Codes: H05K 2201/10734 Ball grid array [BGA]; Bump grid array
• CPC Class Codes: Y10T 29/49016 Antenna or wave energy "plumbing" making
• CPC Class Codes: Y10T 29/49018 with other electrical component

Abstract

A RFIC includes a die and a package. The die contains a radio frequency (RF) input/output (I/O) section, an RF-to-baseband conversion section, and a baseband processing section. The package includes a plurality of connections for connecting to the die. The die is positioned within the package to minimize adverse affects of parasitics components of coupling the RFIO section to an antenna. The positioning of the die within the package may be offset from the center of the package and/or positioned at the edge of the package.

Claims

1. A radio frequency integrated circuit (RFIC) comprises:

a die containing a radio frequency (RF) input/output (I/O) section, an RF to baseband conversion section, and a baseband processing section; and

a package having a plurality of connections for connecting to the die, wherein the die is positioned within the package to minimize adverse affects of parasitic components of coupling between the RF I/O section and an antenna.

2. The RFIC of claim 1, wherein the plurality of connections comprises a plurality of solder balls of a ball grid array package.

3. The RFIC of claim 1 further comprises positioning the die offset from a center of the package.

4. The RFIC of claim 1 further comprises positioning the die at an edge of the package.

5. The RFIC of claim 1, wherein the minimizing the adverse affects of the parasitic components of the coupling comprises:

reducing inductance of coupling between the RF I/O section and the corresponding connections of the plurality of connections; and

reducing inductance of coupling between the corresponding connections and the antenna.

6-13. -13. (canceled)