Method and apparatus for arbitration and fairness on a full-duplex bus using dual phases

• US 20050111482A1
• Filed: 12/21/2004
• Published: 05/26/2005
• Est. Priority Date: 11/05/1999
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Computer Incorporated (Apple Inc.)
• Inventors: Johas Teener, Michael D.
• Granted Patent: US 7,650,452 B2
• Time in Patent Office: Days
• US Class Current: 370/462
• CPC Class Codes: G06F 13/3625 using a time dependent access
• CPC Class Codes: G06F 13/4295 using an embedded synchronisation

Abstract

A method and apparatus for arbitrating on a high performance serial bus is disclosed. The invention provides for a plurality of arbitration phases and an arbitration advancing means.

Claims

1. A network of nodes sending arbitration requests to a BOSS node, at least one of said nodes containing instructions which, when executed by a computer, provide an arbitration fairness protocol in said network, by performing the acts of:

providing an first arbitration phase, a second arbitration phase, and an arbitration advancing means;

sending an arbitration reset command for the first arbitration phase by the BOSS node;

granting arbitration by the BOSS node of arbitration requests made by the plurality of nodes for said first arbitration phase during said second arbitration phase;

granting arbitration by the BOSS node of arbitration requests made by the plurality of nodes for said first arbitration phase during said first arbitration phase;

advancing to said second arbitration phase according to said advancing means;

sending an arbitration reset command for said second arbitration phase by the BOSS node;

granting arbitration by the BOSS node of arbitration requests made by the plurality of nodes for said second arbitration phase during said first arbitration phase; and

granting arbitration by the BOSS node of arbitration requests made by the plurality of nodes for said second arbitration phase during said second arbitration phase.

2. The network of claim 1, wherein said advancing means includes a timer.

3. The network of claim 1, wherein said advancing means is implemented on the BOSS node.

4. The network of claim 1, wherein said first arbitration phase is an odd arbitration phase.

5. The network of claim 1, wherein said second arbitration phase is an even arbitration phase.

6. The network of claim 1, comprising the additional act of repeating said arbitration fairness protocol as often as the BOSS node.