Amoled display and driving method thereof

• US 20050116656A1
• Filed: 11/11/2004
• Published: 06/02/2005
• Est. Priority Date: 11/27/2003
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Shin, Dong-Yong
• Granted Patent: US 8,872,736 B2
• Time in Patent Office: Days
• US Class Current: 315/169.300
• CPC Class Codes: G09G 2300/0804 Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2310/061 for resetting or blanking
• CPC Class Codes: G09G 2330/025 Reduction of instantaneous peaks of current
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes

Abstract

An emission control circuit for controlling emission of R, G, B EL elements and method for driving an organic light emitting diode display using the same. An emission control signal generating circuit of a flat panel display includes a plurality of pixels. Each pixel includes a plurality of EL elements, and emission of the elements is controlled by emission control signals. The circuit includes a first signal generating device for generating one of the emission control signals, and a plurality of second signal generating devices for generating other ones of the emission control signals using an output signal of the first signal generating device and an external control signal. The first signal generating device may include a shift register. Each of the plurality of second signal generating devices may include a NAND gate using the external signal and the external control signal, or an inverted signal thereof, as two inputs.

Claims

1. An emission control signal generating circuit of a flat panel display comprising a plurality of pixels, each said pixel including a plurality of EL elements, and emission of said elements being controlled by a plurality of emission control signals, the circuit comprising:

a first signal generating device for generating one of the plurality of emission control signals as an output signal; and

a plurality of second signal generating devices for generating other ones of the plurality of emission control signals using the output signal of the first signal generating device and an external control signal.

2. The circuit as claimed in claim 1, wherein the first signal generating device for generating said one of the plurality of emission control signals includes a shift register.

3. The circuit as claimed in claim 1, wherein one of the plurality of second signal generating devices includes a NAND gate having the external control signal and the output signal of the first signal generating device as two inputs, and another one of the plurality of second signal generating devices includes a NAND gate having an inverted signal of the external control signal and the output signal of the first signal generating device as two inputs.

4. The circuit as claimed in claim 1, wherein one of the plurality of second signal generating devices includes:

a first transfer gate for providing the output signal of the first signal generating device as one of said other ones of the plurality of emission control signals using the external control signal having a first level and an inverted signal of the external control signal having a second level; and

a second transfer gate for allowing said one of said other ones of the plurality of emission control signals to have the second level using the external control signal having the second level and the inverted signal of the external control signal having the first level.

5. The circuit as claimed in claim 4, wherein another one of the plurality of second signal generating devices includes:

a third transfer gate for providing the output signal of the first signal generating device as another one of said other ones of the plurality of emission control signals using the external control signal having the second level and the inverted signal of the external control signal having the first level; and

a fourth transfer gate for allowing said another one of said other ones of the plurality of emission control signals to have the second level using the external control signal having the first level and the inverted signal of the external control signal having the second level.

6. The circuit as claimed in claim 4, wherein the first level is a high logic level, and the second level is a low logic level.

7. The circuit as claimed in claim 5, wherein the first level is a high logic level, and the second level is a low logic level.

8. The circuit as claimed in claim 1, wherein the external control signal is an output control signal that controls the output of the emission control signal generating circuit, which is supplied from an external source.

9. The circuit as claimed in claim 1, wherein the plurality of EL elements are sequentially driven per each of a plurality of subframes that form one frame, and are in a black color state during one of the plurality of subframes.

10. The circuit as claimed in claim 1, wherein the plurality of EL elements are sequentially driven per each of subframes that form one frame, and one of the plurality of EL elements is driven again during one of the plurality of subframes.

11. An emission control signal generating circuit of an organic light emitting diode display comprising a plurality of pixels, each said pixel including R, G, B EL elements, emission of said elements being controlled by R, G, B emission control signals, the circuit comprising:

a shift register for generating the G emission control signal as an output signal;

a first NAND gate for generating the R emission control signal using the output signal of the shift register and an external control signal as two inputs;

an inverting gate for inverting the external control signal to generate an inverted external control signal; and

a second NAND gate for generating the B emission control signal using the inverted external control signal and the output signal of the shift register as two inputs.

12. The circuit as claimed in claim 11, wherein the R, G, B EL elements are sequentially driven per each of a plurality of subframes that form one frame, and the R, G, B EL elements are in a black color state or one of the R, G, B EL elements is driven again during one of the plurality of subframes.

13. An emission control signal generating circuit of an organic light emitting diode display comprising a plurality of pixels, each said pixel including R, G, B EL elements, and emission of said elements being controlled by R, G, B emission control signals, the circuit comprising:

an inverting gate for inverting an external control signal to generate an inverted external control signal;

a shift register for generating the G emission control signal as an output signal;

a first transfer gate for transferring the output signal of the shift register as the R emission control signal using the inverted external control signal and the external control signal;

a second transfer gate for grounding the R emission control signal using the inverted external control signal and the external control signal;

a third transfer gate for transferring the output signal of the shift register as the B emission control signal using the inverted external control signal and the external control signal; and

a fourth transfer gate for grounding the B emission control signal using the inverted external control signal and the external control signal.

14. The circuit as claimed in claim 13, wherein the R, G, B EL elements are sequentially driven per each of a plurality of subframes that form one frame, and the plurality of EL elements are in a black color state or one of the plurality of EL elements is driven again during one of the plurality of subframes.

15. An organic light emitting diode display, comprising:

a plurality of gate lines, a plurality of data lines, a plurality of emission control lines, and a plurality of power supply lines;

a pixel portion including a plurality of pixels, each said pixel being connected to a corresponding said gate line, a corresponding said data line, a corresponding said emission control line and a corresponding said power supply line;

a gate line driving circuit for supplying the plurality of gate lines with a plurality of scan signals;

a data line driving circuit for sequentially supplying the plurality of data lines with R, G, B data signals; and

an emission control signal generating circuit for supplying the plurality of emission control lines with a plurality of emission control signals,

wherein each said pixel includes R, G, B EL elements, which sequentially emit light based on the emission control signals per each of a plurality of subframes that form one frame, and

wherein the emission control signal generating circuit includes;

a first signal generating device for generating one of the plurality of emission control signals as an output signal; and

a plurality of second signal generating devices for generating other ones of the plurality of emission control signals using the output signal of the first signal generating device and an external control signal.

16. The organic light emitting diode display as claimed in claim 15, wherein the first signal generating device includes a shift register.

17. The organic light emitting diode display as claimed in claim 15, wherein one of the plurality of second signal generating devices includes a NAND gate having the external control signal and the output signal of the first signal generating device as two inputs, and another one of the plurality of second signal generating devices includes a NAND gate having an inverted signal of the external control signal and the output signal of the first signal generating device as two inputs.

18. The organic light emitting diode display as claimed in claim 15, wherein one of the plurality of second signal generating devices includes:

a first transfer gate for providing the output signal of the first signal generating device as one of said other ones of the plurality of emission control signals using the external control signal having a first level and an inverted signal of the external control signal having a second level; and

a second transfer gate for allowing said one of said other ones of the plurality of emission control signals to have the second level using the external control signal having the second level and the inverted signal of the external control signal having the first level, and

wherein another one of the plurality of second signal generating devices includes;

a third transfer gate for providing the output signal of the first signal generating device as another one of said other ones of the plurality of emission control signals using the external control signal having the second level and the inverted signal of the external control signal having the first level; and

a fourth transfer gate for allowing said another one of said other ones of the plurality of the emission control signals to have the second level using the external control signal having the first level and the inverted signal of the external control signal having the second level.

19. The organic light emitting diode display as claimed in claim 18, wherein the first level is a high logic level, and the second level is a low logic level, and the external control signal is an output control signal that controls an output of the emission control signal generating circuit, which is supplied from an external source.

20. The organic light emitting diode display as claimed in claim 15, wherein the R, G, B EL elements are sequentially driven per each of a plurality of subframes that form one frame, and the R, G, B EL elements are in a black color or one of the R, G, B EL elements is driven again during one of the plurality of subframes.

21. The organic light emitting diode display as claimed in claim 18, wherein each said pixel further includes:

at least one switching transistor for switching a data signal;

at least one driving transistor for providing the R, G, B EL elements with a driving current corresponding to the data signal;

a capacitor for storing the data signal; and

a sequential control device for controlling sequential driving of the R, G, B EL elements.

22. The organic light emitting diode display as claimed in claim 21, wherein the sequential control device includes first, second and third P-type thin film transistors, each said thin film transistor including a gate to which a corresponding said emission control signal is applied, a source connected to the driving device in common, and a drain connected to a corresponding one of the R, G, B EL elements.

23. The organic light emitting diode display as claimed in claim 21, wherein the sequential control device includes a first N-type thin film transistor, a first P-type thin film transistor and a second N-type thin film transistor, each said thin film transistor including a gate to which a corresponding said emission control signal is applied, a source connected to the driving device in common, and a drain connected to a corresponding one of the R, G, B EL elements.

24. An organic light emitting diode display, comprising:

a plurality of gate lines, a plurality of data lines, a plurality of emission control lines, and a plurality of power supply lines;

a pixel portion including a plurality of pixels, each said pixel being connected to a corresponding said gate line, a corresponding said data line, a corresponding said emission control line and a corresponding said power supply line;

a gate line driving circuit for supplying the plurality of gate lines with a plurality of scan signals;

a data line driving circuit for sequentially supplying the plurality of data lines with R, G, B data signals; and

an emission control signal generating circuit for supplying the plurality of emission control lines with R, G, B emission control signals,

wherein each said pixel includes R, G, B EL elements, which sequentially emit light based on the R, G, B emission control signals per each of a plurality of subframes that form one frame, and

wherein the emission control signal generating circuit includes;

a shift register for generating the G emission control signal as an output signal;

a first NAND gate for generating the R emission control signal using the output signal of the shift register and an external control signal as two inputs;

an inverting gate for inverting the external control signal to generate an inverted external control signal; and

a second NAND gate for generating the B emission control signal using the inverted external control signal and the output signal of the shift register as two inputs.

25. An organic light emitting diode display, comprising:

a plurality of gate lines, a plurality of data lines, a plurality of emission control lines, and a plurality of power supply lines;

a pixel portion including a plurality of pixels, each said pixel being connected to a corresponding said gate line, a corresponding said data line, a corresponding said emission control line and a corresponding said power supply line;

a gate line driving circuit for supplying the plurality of gate lines with a plurality of scan signals;

a data line driving circuit for sequentially supplying the plurality of data lines with R, G, B data signals; and

an emission control signal generating circuit for supplying the plurality of emission control lines with R, G, B emission control signals,

wherein each said pixel includes R, G, B EL elements, which sequentially emit light based on the R, G, B emission control signals per each of a plurality of subframes that form one frame, and

wherein the emission control signal generating circuit includes;

an inverting gate for inverting an external control signal to generate an inverted external control signal;

a shift register for generating the G emission control signal as an output signal;

a first transfer gate for transferring the output signal of the shift register as the R emission control signal using the inverted external control signal and the external control signal;

a second transfer gate for grounding the R emission control signal using the inverted external control signal and the external control signal;

a third transfer gate for transferring the output signal of the shift register as the B emission control signal using the inverted external control signal and the external control signal; and

a fourth transfer gate for grounding the B emission control signal using the inverted external control signal and the external control signal.

26. A method for driving an organic light emitting diode display comprising a plurality of pixels, each said pixel including R, G, B EL elements, emission of said elements being controlled by R, G, B emission control signals, the method comprising:

generating the G emission control signal during a first subframe among a plurality of subframes that form one frame to emit the G EL element;

generating the R emission control signal using the G emission control signal during a second said subframe to emit the R EL element;

generating the B emission control signal using the G emission control signal during a third said subframe to emit the B EL element; and

maintaining the EL elements to be a black color during a rest subframe among the plurality of subframes.

27. A method for driving an organic light emitting diode display comprising a plurality of pixels, each said pixel including R, G, B EL elements, emission of said elements being controlled by R, G, B emission control signals, the method comprising:

generating the G emission control signal during a first subframe among a plurality of subframes that form one frame to emit the G EL element;

generating the R emission control signal using the G emission control signal during a second said subframe to emit the R EL element;

generating the B emission control signal using the G emission control signal during a third said subframe to emit the B EL element; and

emitting one of the R, G, B EL elements during a rest subframe among the plurality of subframes.