Dynamic threshold voltage MOSFET on SOI

• US 20050121699A1
• Filed: 12/08/2003
• Published: 06/09/2005
• Est. Priority Date: 12/08/2003
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Chidambarrao, Dureseti, Chen, Xiangdong, Wang, Geng
• Granted Patent: US 7,045,873 B2
• Time in Patent Office: Days
• US Class Current: 257/213
• CPC Class Codes: H01L 29/783 comprising a gate to body connection, i.e. bulk dynamic threshold voltage MOSFET for thin film transistors H01L29/78612, H01L29/78696

Abstract

Provision of a body control contact adjacent a transistor and between the transistor and a contact to the substrate or well in which the transistor is formed allows connection and disconnection of the substrate of the transistor to and from a zero (ground) or substantially arbitrary low voltage in accordance with control signals applied to the gate of the transistor to cause the transistor to exhibit a variable threshold which maintains good performance at low supply voltages and reduces power consumption/dissipation which is particularly advantageous in portable electronic devices. Floating body effects (when the transistor substrate in disconnected from a voltage source in the “on” state) are avoided since the substrate is discharged when the transistor is switched to the “off” state. The transistor configuration can be employed with both n-type and p-type transistors which may be in complementary pairs.

Claims

1. A field effect transistor comprising

a transistor portion comprising a source, drain and gate formed in a semiconductor layer of a first conductivity type,

a body contact to said semiconductor layer, and

a body control contact of a conductivity type opposite said first conductivity type and interposed between said gate and said body contact.

2. A field effect transistor as recited in claim 1, further including

a connection between said gate and said body control contact.

3. A field effect transistor as recited in claim 2, wherein said contact to said semiconductor layer is a region of said first conductivity type.

4. A field effect transistor as recited in claim 1, wherein said contact to said semiconductor layer is a region of said first conductivity type.

5. A field effect transistor as recited in claim 1, wherein said contact to said semiconductor layer is connected to a low voltage opposite in polarity to a voltage applied to said field effect transistor.

6. A field effect transistor as recited in claim 1, wherein said semiconductor layer is formed on an insulator on a substrate.

7. A field effect transistor as recited in claim 1, wherein said semiconductor layer is a silicon layer of a silicon-on-insulator substrate.

8. A field effect transistor as recited in claim 1, wherein a thickness of said semiconductor layer is approximately 800 Å

and said body control contact extends approximately 300 Å

to 350 Å

into said semiconductor layer.

17. A field effect transistor as recited in claim 1, wherein a thickness of said semiconductor layer is approximately 800 Å

and said body control contact extends approximately 300 Å

to 350 Å

into said semiconductor layer.

9. An integrated circuit comprising

a plurality of transistor portions comprising a source, drain and gate formed in a semiconductor layer of a first conductivity type,

a body contact to said semiconductor layer, and

a body control contact of a conductivity type opposite said first conductivity type and interposed between said gate and said body contact.

10. An integrated circuit as recited in claim 9, further including

a connection between said gate and said body control contact.

11. An integrated circuit as recited in claim 10, wherein said contact to said semiconductor layer is a region of said first conductivity type.

12. An integrated circuit as recited in claim 9, wherein said contact to said semiconductor layer is a region of said first conductivity type.

13. An integrated circuit as recited in claim 9, wherein said contact to said semiconductor layer is connected to a low voltage opposite in polarity to a voltage applied to said field effect transistor.

14. An integrated circuit as recited in claim 9, wherein said semiconductor layer is formed on an insulator on a substrate.

15. An integrated circuit as recited in claim 9, wherein said semiconductor layer is a silicon layer of a silicon-on-insulator substrate.

16. An integrated circuit as recited in claim 9, wherein said plurality of transistor portions. include a complementary transistor pair.

18. A portable electronic device comprising

a portable power supply, and

an integrated circuit, said integrated circuit comprising

a plurality of transistor portions comprising a source, drain and gate formed in a semiconductor layer of a first conductivity type,

a body contact to said semiconductor layer, and

a body control contact of a conductivity type opposite said first conductivity type and interposed between said gate and said body contact.

19. A portable electronic device as recited in claim 18, wherein said integrated circuit further includes

a connection between a gate a said transistor portion and said body control contact.

20. A portable electronic device as recited in claim 18, wherein said plurality of transistor portions include a complementary transistor pair.