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Peripheral device feature allowing processors to enter a low power state

  • US 20050156038A1
  • Filed: 01/20/2004
  • Published: 07/21/2005
  • Est. Priority Date: 01/20/2004
  • Status: Active Grant
First Claim
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1. A system, comprising:

  • a processor;

    a host controller coupled to the processor;

    a device coupled to the host controller; and

    wherein the device is electrically disconnected from the host controller if the device is not in an active state.

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