Floating gate memory cell and forming method

• US 20050158976A1
• Filed: 12/15/2004
• Published: 07/21/2005
• Est. Priority Date: 06/26/2002
• Status: Active Grant

• Current Assignee: Macronix International Co., Ltd.
• Original Assignee: Macronix International Co., Ltd.
• Inventors: Luoh, Tuung
• Granted Patent: US 7,148,105 B2
• Time in Patent Office: Days
• US Class Current: 438/593
• CPC Class Codes: H01L 29/40114 the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
• CPC Class Codes: H01L 29/42324 Gate electrodes for transistors with a floating gate

Abstract

A floating gate memory cell comprises a substrate with a drain and a source separated by a channel, a floating gate separated from the channel by a first insulation layer, and a control gate separated from the floating gate by a second insulation layer. The deposition environment is chosen so that the grain size of at least a portion of the floating gate opposite the first insulation layer is about 50-500 Å.

Claims

1. A method for forming a polysilicon floating gate during the manufacture of a floating gate memory cell using a deposition process, comprising:

selecting a reaction gas and, optionally, a second gas for forming the floating gate during the deposition process consisting essentially of a reaction gas SiX or Si2Y or an appropriate combination thereof, and, optionally, a second gas Z, where at least one of X, Y and Z comprises deuterium (D); and

forming a microcrystalline polysilicon floating gate using said selected reaction gas/second gas.

2. The method according to claim 1 wherein the selecting step is carried out with X comprising at least one of:

H4, H2Cl2, HCl3, D4, D2Cl2, D3Cl.

3. The method according to claim 1 wherein the selecting step is carried out with Y comprising at least one of:

H6, H4Cl2, H2Cl4, D6, D4Cl2, D2Cl4.

4. The method according to claim 1 wherein the selecting step is carried out with Z comprising at least one of:

D2, H2, D3.

5. The method according to claim 1 wherein the selecting step is carried out with the reaction gas/second gas being SiD4/D2.

6. The method according to claim 1 wherein the selecting step is carried out with the reaction gas/second gas being Si2D6/D2.

7. The method according to claim 1 wherein the selecting step is carried out with the reaction gas/second gas comprising at least one of the following:

SiD4/D2, SiD4/H2, SiH4/D2.

8. The method according to claim 1 wherein the selecting step is carried out with the reaction gas/second gas comprising at least one of the following:

Si2D6/D2, Si2D6/H2, Si2H6/D2.

9. The method according to claim 1 wherein the forming step comprises:

depositing an amorphous silicon material for the floating gate; and

then

treating the amorphous silicon floating gate material to exhibit a desired microcrystalline polysilicon grain structure.

10. The method according to claim 9 wherein the treating step is carried out so that the microcrystalline polysilicon floating gate has a grain size of about 200-500 Å

.

11. The method according to claim 9 wherein the treating step is carried out by subjecting the amorphous silicon floating gate material to a temperature above about 600°

C.

12. The method according to claim 1 wherein the forming step takes place with the polysilicon material being deposited with a desired microcrystalline polysilicon grain structure.

13. The method according to claim 1 wherein the selecting and forming steps are carried out during an LPCVD procedure.

14. The method according to claim 13 wherein the LPCVD process comprises a chosen one of the following processes:

furnace, single wafer.

15. The method according to claim 1 wherein the LPCVD process comprises a furnace process carried out at a pressure from about 0.1 milliTorr to about 5 Torr and at a temperature of about 500°

C. to about 700°

C.

16. The method according to claim 1 wherein the LPCVD process comprises a single wafer process carried out at a pressure from about 10 Torr to about 500 Torr and at a temperature of about 580°

C. to about 800°

C.

17. The method according to claim 1 wherein the forming step is carried out so that the microcrystalline polysilicon floating gate has a grain size of about 50-500 Å

.

18. The method according to claim 1 wherein the forming step is carried out so that the microcrystalline polysilicon floating gate has a grain size of about 50-300 Å

.

19. A method for forming a polysilicon floating gate during the manufacture of a floating gate memory cell using a deposition process, comprising:

selecting a reaction gas and, optionally, a second gas for forming the floating gate during the deposition process consisting essentially of a reaction gas SiX and, optionally, a second gas Y;

the selecting step being carried out with X comprising at least one of;

H4, H2Cl2, HCl3, D4, D2Cl2, D3Cl and Y comprising at least one of;

D2, H2, D3; and

forming a microcrystalline polysilicon floating gate using said selected reaction gas/second gas.

20. The method according to claim 19 wherein the forming step comprises:

depositing an amorphous silicon material for the floating gate; and

then

treating the amorphous silicon floating gate material to exhibit a desired microcrystalline polysilicon grain structure.

21. The method according to claim 20 wherein the treating step is carried out so that the microcrystalline polysilicon floating gate has a grain size of about 200-500 Å

.

22. The method according to claim 19 wherein the forming step takes place with the polysilicon material being deposited with a grain size of about 50-300 Å

.

23. The method according to claim 19 wherein at least one of X and Y comprises deuterium (D).

24. A method for forming a polysilicon floating gate during the manufacture of a floating gate memory cell using a deposition process, comprising:

selecting a reaction gas and, optionally, a second gas for forming the floating gate during the deposition process consisting essentially of a reaction gas Si2X and, optionally, a second gas Y;

the selecting step being carried out with X comprising at least one of;

H6, H4Cl2, H2Cl4, D6, D4Cl2, D2Cl4 and Y comprising at least one of;

D2, H2, D3; and

forming a microcrystalline polysilicon floating gate using said selected reaction gas/second gas.

25. The method according to claim 24 wherein the forming step comprises:

depositing an amorphous silicon material for the floating gate; and

then

treating the amorphous silicon floating gate material to exhibit a desired microcrystalline polysilicon grain structure.

26. The method according to claim 25 wherein the treating step is carried out so that the microcrystalline polysilicon floating gate has a grain size of about 200-500 Å

.

27. The method according to claim 24 wherein the forming step takes place with the polysilicon material being deposited with a grain size of about 50-300 Å

.

28. The method according to claim 24 wherein at least one of X and Y comprises deuterium (D).

29. A method for forming a polysilicon floating gate during the manufacture of a floating gate memory cell using a deposition process, the floating gate memory cell of a type comprising a substrate with a drain and a source separated by a channel, a floating gate separated from the channel by a first insulation layer, and a control gate separated from the floating gate by a second insulation layer, comprising:

choosing a deposition environment comprising;

selecting a reaction gas;

selecting a reaction gas flow rate;

selecting a deposition pressure; and

selecting a deposition time;

forming a microcrystalline polysilicon floating gate; and

said the selecting steps chosen so that the grain size of at least a portion of the floating gate opposite the first insulation layer is about 50-500 Å

.

30. The method according to claim 29 wherein the selecting steps are carried out so that the grain size is between about 50-300 Å

.

31. The method according to claim 29 wherein the reaction gas selecting step comprises:

selecting a reaction gas and, optionally, a second gas consisting essentially of a reaction gas SiX or Si2Y or an appropriate combination thereof, and, optionally, a second gas Z, where at least one of X, Y and Z comprises deuterium (D).