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Apparatus and methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer

  • US 20050161801A1
  • Filed: 03/18/2005
  • Published: 07/28/2005
  • Est. Priority Date: 08/30/2000
  • Status: Active Grant
First Claim
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1. In combination, a network analyzer and an electrical component device under test using the network analyzer, the combination comprising:

  • a network analyzer comprising;

    a first port;

    a second port;

    a coaxial probe connected to one of the first port and the second port for establishing electrical contact on one or more electrical leads of an electrical component device under test; and

    an electrical component device under test comprising;

    a substrate;

    a plurality of leads formed on said substrate, each lead of said plurality of leads at least including a conductive trace formed on a surface of said substrate, a conductive via extending through said substrate having one end thereof electrically connected to said conductive trace, and a ball lead formed on an opposing surface of said substrate and in electrical communication with an opposing end of said conductive via; and

    a central conductive plane formed on at least a portion of said surface of said substrate, said conductive trace of at least one lead of said plurality of leads electrically connected to said central conductive plane.

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