Image processing system to control vehicle headlamps or other vehicle equipment

• US 20050165526A1
• Filed: 03/15/2005
• Published: 07/28/2005
• Est. Priority Date: 03/05/2001
• Status: Active Grant

• Current Assignee: Harold C. Ockerse, Joseph S. Stam, Mark W. Pierce
• Original Assignee: Harold C. Ockerse, Joseph S. Stam, Mark W. Pierce
• Inventors: Pierce, Mark W., Stam, Joseph S., Ockerse, Harold C.
• Granted Patent: US 7,149,613 B2
• Time in Patent Office: Days
• US Class Current: 701/36
• CPC Class Codes: B60Q 1/1423 Automatic dimming circuits, i.e. switching between high beam and low beam due to change of ambient light or light level in road traffic
• CPC Class Codes: B60Q 2300/41 preceding vehicle
• CPC Class Codes: B60Q 2300/42 oncoming vehicle
• CPC Class Codes: B60S 1/0822 characterized by the arrangement or type of detection means
• CPC Class Codes: B60S 1/0844 including a camera
• CPC Class Codes: B60S 1/087 including an ambient light sensor control of vehicle lights B60Q
• CPC Class Codes: B60S 1/0885 the sensor being integrated in a rear-view mirror module
• CPC Class Codes: B60W 2555/20 Ambient conditions, e.g. wind or rain
• CPC Class Codes: B60W 30/09 Taking automatic action to avoid collision, e.g. braking and steering
• CPC Class Codes: G06V 10/141 Control of illumination
• CPC Class Codes: G06V 10/94 Hardware or software architectures specially adapted for image or video understanding
• CPC Class Codes: G06V 20/584 of vehicle lights or traffic lights
• CPC Class Codes: G06V 2201/08 Detecting or categorising vehicles
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof

Abstract

An imaging system of the invention includes an image array sensor including a plurality of pixels. Each of the pixels generates a signal indicative of the amount of light received on the pixel. The imaging system further includes an analog to digital converter for quantizing the signals from the pixels into a digital value. The system further includes a memory including a plurality of allocated storage locations for storing the digital values from the analog to digital converter. The number of allocated storage locations in the memory is less than the number of pixels in the image array sensor. According to another embodiment, an imaging device includes an image sensor having a plurality of pixels arranged in an array; and a multi-layer interference filter disposed over said pixel array, said multi-layer interference filter being patterned so as to provide filters of different colors to neighboring pixels or groups of pixels.

Claims

1. An imaging system for a vehicle, comprising:

at least one image array sensor and a control circuit, said control circuit is in communication with said at least one image array sensor via a bus, wherein the imaging system is configured for use in a vehicle system selected from the group comprising;

a headlamp control, an electrochromic mirror control, an information display, a rain sensor, a collision avoidance system, an adaptive cruise control, a lane departure warning system and a climate control system.

2. An imaging system as in claim 1 wherein said bus is a serial interface.

3. An imaging system as in claim 2 wherein said serial interface is a three wire serial interface which communicates image exposure instruction from said control circuit to a timing and control circuit and communicates image data from said image array sensor to said control circuit.

4. An imaging system as in claim 1 wherein said bus is a parallel bus.

5. An imaging system as in claim 4 wherein said bus is configured to communicate image data with image control parameters on the same signal lines.

6. An imaging system as in claim 4 wherein said bus is configured to communicate image data on separate lines from image control parameters.

7. An imaging system as in claim 1 wherein said bus is selected from the group comprising:

analog signals configured as a common NTSC video signal, a MOST bus, an IEEE-1394 bus, a CAN bus, and a bus that conforms to the AMI-C specification.

8. An imaging system as in claim 1 wherein said control circuit comprises a first microprocessor and a second microprocessor, wherein said at least one image sensor is in communication with said first microprocessor via a first bus and said first microprocessor is in communication with said second microprocessor via a second bus.

9. An imaging system as in claim 8 wherein said first bus is a parallel bus and said second bus is a serial bus.

10. An imaging system as in claim 1 wherein said control circuit is configured to analyze at least one image as a function of a digital filter.

11. An imaging system as in claim 1 comprising at least two vehicle systems configured to share at least one device selected from the group comprising:

a power supply, a light sensor and a microcontroller.

12. An imaging system for a vehicle, comprising:

a control circuit configured to analyze at least one image as a function of a digital filter, wherein the imaging system is configured for use in a vehicle system selected from the group comprising;

a headlamp control, an electrochromic mirror control, an information display, a collision avoidance system, an adaptive cruise control, a lane departure warning system and a climate control system.

13. An imaging system as in claim 12 wherein said digital filter is a matrix of coefficients to multiply pixels in a region surrounding the current pixel in order to obtain information about the pixel.

14. An imaging system as in claim 12 wherein said digital filter is configured to quantify frequency components of at least one image.

15. An imaging system as in claim 12 further comprising at least one image array sensor, wherein said at least one image array sensor in communication with said control circuit over a bus.

16. An imaging system as in claim 15 wherein said bus is a serial interface.

17. An imaging system as in claim 16 wherein said serial interface is a three wire serial interface which communicates image exposure instruction from said control circuit to a timing and control circuit and communicates image data from said image array sensor to said control circuit.

18. An imaging system as in claim 15 wherein said bus is a parallel bus.

19. An imaging system as in claim 18 wherein said bus is configured to communicate image data with image control parameters on the same signal lines.

20. An imaging system as in claim 18 wherein said bus is configured to communicate image data on separate lines from image control parameters.

21. An imaging system as in claim 15 wherein said bus is selected from the group comprising:

analog signals configured as a common NTSC video signal, a MOST bus, an IEEE-1394 bus, a CAN bus, and a bus that conforms to the AMI-C specification.

22. An imaging system as in claim 15 wherein said control circuit comprises a first microprocessor and a second microprocessor, wherein said at least one image sensor is in communication with said first microprocessor via a first bus and said first microprocessor is in communication with said second microprocessor via a second bus.

23. An imaging system as in claim 22 wherein said first bus is a parallel bus and said second bus is a serial bus.

24. An imaging system as in claim 12 comprising at least two vehicle systems configured to share at least one device selected from the group comprising:

a power supply, a light sensor and a microcontroller.

25. An imaging system for a vehicle, comprising:

at least one device selected from the group comprising;

a power supply, a light sensor and a microcontroller, wherein the imaging system is configured for use in a vehicle system selected from the group comprising;

a headlamp control, an electrochromic mirror control, an information display, a rain sensor, a collision avoidance system, an adaptive cruise control, a lane departure warning system and a climate control system, at least two of said vehicle systems are configured to share at least one device selected from the group comprising;

a power supply, a light sensor and a microcontroller.

26. An imaging system as in claim 25 further comprising at least one image array sensor and a control circuit in communication with one another over a bus.

27. An imaging system as in claim 26 wherein said bus is a serial interface.

28. An imaging system as in claim 27 wherein said serial interface is a three wire serial interface which communicates image exposure instruction from said control circuit to a timing and control circuit and communicates image data from said image array sensor to said control circuit.

29. An imaging system as in claim 26 wherein said bus is a parallel bus.

30. An imaging system as in claim 29 wherein said bus is configured to communicate image data with image control parameters on the same signal lines.

31. An imaging system as in claim 29 wherein said bus is configured to communicate image data on separate lines from image control parameters.

32. An imaging system as in claim 26 wherein said bus is selected from the group comprising:

analog signals configured as a common NTSC video signal, a MOST bus, an IEEE-1394 bus, a CAN bus, and a bus that conforms to the AMI-C specification.

33. An imaging system as in claim 26 wherein said control circuit comprises a first microprocessor and a second microprocessor, wherein said at least one image sensor is in communication with said first microprocessor via a first bus and said first microprocessor is in communication with said second microprocessor via a second bus.

34. An imaging system as in claim 33 wherein said first bus is a parallel bus and said second bus is a serial bus.

35. An imaging system as in claim 26 wherein said control circuit is configured to analyze at least one image as a function of a digital filter.