Storage device employing a flash memory

• US 20050166088A1
• Filed: 03/22/2005
• Published: 07/28/2005
• Est. Priority Date: 11/26/1991
• Status: Active Grant

• Current Assignee: Emergence Memory Solutions LLC
• Original Assignee: Hajime Yamagami, Kenichi Kaki, Kouichi Terada, Kunihiro Katayama, Takashi Tsunehiro, Takeshi Furuno, Yoshihiro Hayashi
• Inventors: Hayashi, Yoshihiro, Katayama, Kunihiro, Yamagami, Hajime, Furuno, Takeshi, Terada, Kouichi, Kaki, Kenichi, Tsunehiro, Takashi
• Granted Patent: US 7,064,995 B2
• Time in Patent Office: Days
• US Class Current: 714/8
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/2022 Flash memory
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0616 in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0664 at device level, e.g. emulation of a storage device or system
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G11C 16/102 External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 29/765 in solid state disks

Abstract

A semiconductor disk wherein a flash memory into which data is rewritten in block unit is employed as a storage medium, the semiconductor disk including a data memory in which file data are stored, a substitutive memory which substitutes for blocks of errors in the data memory, an error memory in which error information of the data memory are stored, and a memory controller which reads data out of, writes data into and erases data from the data memory, the substitutive memory and the error memory. Since the write errors of the flash memory can be remedied, the service life of the semiconductor disk can be increased.

Claims

1. A storage device employing a nonvolatile semiconductor flash memory, wherein said nonvolatile semiconductor flash memory is divided into a plurality of physical sectors identified by physical addresses, wherein said flash memory carries out data write operation of a write data from a host system into a sector of said plurality of physical sectors in response to a host logical address accompanied with said write data from said host system, said storage device includes:

a memory controller generates a physical address in response to said host logical address for said data write operation of said write data from said host system,

wherein said memory controller carries out address conversion from host logical addresses to physical addresses,

wherein even when data of a specific host logical address are frequently rewritten from said host system, the same physical addresses are not used in said storage device, but different physical addresses, which correspond to said same specific host logical address and are generated by said memory controller, are used to thereby uniformalizing increases in the numbers of erasures of said plurality of physical sectors,

wherein said memory controller seeks an old physical sector of said specific host logical address in which unnecessary data is written and carries out an erase operation of unnecessary data in said old physical sector among said plurality of physical sectors, and

wherein said memory controller stores a correspondence of a new physical sector to the specific host logical address within an address table for said address conversion,

wherein said memory controller is provided with a volatile memory to store address data, and

wherein said address data of said volatile memory is originated from an address information stored in said nonvolatile semiconductor flash memory by said controller at start of system operation, and then said memory controller accesses said nonvolatile semiconductor flash memory based upon said address data of said volatile memory.

2. A storage device according to claim 1, wherein each sector of said plurality of physical sectors of said flash memory corresponds to each erase bock of a plurality of erase blocks of said flash memory, one erase block of said plurality of erase blocks includes a large number of data blocks, said one erase block is an area larger than one data block of said data blocks, and said large number of data blocks are erased within said one erase block in an erase operation of said one erase block of said flash memory.

3. A storage device according to claim 2, wherein said memory controller carries out a current data write operation in which a current write data from said host system is written into selected one sector of said plurality of physical sectors identified by a current physical address which is converted by said memory controller from a current host logical address, and said memory controller carries out a succeeding data write operation in which a succeeding write data from said host system is written into selected another sector of said plurality of physical sectors identified by said current physical address which is converted by said memory controller from a current host logical address from a current host logical address that is identical to said preceding host logical address, and wherein said succeeding data write operation is carried out within said storage device in spite of a condition in which said selected one sector of said plurality of physical sectors is not defective but usable before said succeeding data write operation.

4. A storage device according to claim 1, wherein said address conversion in said memory controller is carried out by address calculation using a pointer of said memory controller.

5. A storage device according to claim 2, wherein said address conversion in said memory controller is carried out by address calculation using a pointer of said memory controller.

6. A storage device according to claim 3, wherein said address conversion in said memory controller is carried out by address calculation using a pointer of said memory controller.

7. A storage device employing a flash memory, wherein said flash memory is divided into a plurality of physical sectors identified by physical addresses, wherein said flash memory carries out data write operation of a write data from a host system into a sector of said plurality of physical sectors in response to a host logical address accompanied with said write data from said host system, said storage device includes:

a memory controller generates a physical address in response to said host logical address for said data write operation of said write data from said host system,

wherein said memory controller carries out address translation from host logical addresses to physical addresses,

wherein even when data of a specific host logical address are frequently rewritten from said host system, the same physical addresses are not used in said storage device, but different physical addresses, which correspond to said same specific host logical address and are generated by said memory controller, are used to thereby leveling of wears by erasures of said plurality of physical sectors,

wherein said memory controller seeks an old physical sector of said specific host logical address in which unnecessary data is written and carries out an erase operation of unnecessary data in said old physical sector among said plurality of physical sectors, and

wherein said memory controller stores a correspondence of a new physical sector to the specific host logical address within a table for said address translation.

8. A storage device according to claim 7, wherein each sector of said plurality of physical sectors of said flash memory corresponds to each erase bock of a plurality of erase blocks of said flash memory, one erase block of said plurality of erase blocks includes a large number of data blocks, said one erase block is an area larger than one data block of said data blocks, and said large number of data blocks are erased within said one erase block in an erase operation of said one erase block of said flash memory.

9. A storage device according to claim 8, wherein said memory controller carries out a current data write operation in which a current write data from said host system is written into selected one sector of said plurality of physical sectors identified by a current physical address which is converted by said memory controller from a current host logical address, and said memory controller carries out a succeeding data write operation in which a succeeding write data from said host system is written into selected another sector of said plurality of physical sectors identified by said current physical address which is converted by said memory controller from a current host logical address from a current host logical address that is identical to said preceding host logical address, and wherein said succeeding data write operation is carried out within said storage device in spite of a condition in which said selected one sector of said plurality of physical sectors is not defective but usable before said succeeding data write operation.

10. A storage device according to claim 7, wherein said address translation in said memory controller is carried out by address calculation using a pointer of said memory controller.

11. A storage device according to claim 8, wherein said address translation in said memory controller is carried out by address calculation using a pointer of said memory controller.

12. A storage device according to claim 9, wherein said address translation in said memory controller is carried out by address calculation using a pointer of said memory controller.

13. A storage device employing a nonvolatile semiconductor flash memory, wherein said nonvolatile semiconductor flash memory is divided into a plurality of physical sectors identified by physical addresses, wherein said flash memory carries out data write operation of a write data from a host system into a sector of said plurality of physical sectors in response to a host logical address accompanied with said write data from said host system, said storage device includes:

a memory controller generates a physical address in response to said host logical address for said data write operation of said write data from said host system,

wherein said memory controller carries out address conversion from host logical addresses to physical addresses,

wherein even when data of a specific host logical address are frequently rewritten from said host system, the same physical addresses are not used in said storage device, but different physical addresses, which correspond to said same specific host logical address and are generated by said memory controller, are used to carry out data write operations of write data from said host system into different physical sectors of said flash memory in response to said same specific host logical address,

wherein said memory controller seeks an old physical sector of said specific host logical address in which unnecessary data is written and carries out an erase operation of unnecessary data in said old physical sector among said plurality of physical sectors,

wherein said memory controller stores a correspondence of a new physical sector to the specific host logical address within an address table for said address conversion,

wherein said memory controller is provided with a volatile memory to store address data, and

wherein said address data of said volatile memory is originated from an address information stored in said nonvolatile semiconductor flash memory by said controller at start of system operation, and then said memory controller accesses said nonvolatile semiconductor flash memory based upon said address data of said volatile memory.

14. A storage device according to claim 13, wherein each sector of said plurality of physical sectors of said flash memory corresponds to each erase bock of a plurality of erase blocks of said flash memory, one erase block of said plurality of erase blocks includes a large number of data blocks, said one erase block is an area larger than one data block of said data blocks, and said large number of data blocks are erased within said one erase block in an erase operation of said one erase block of said flash memory.

15. A storage device according to claim 14, wherein said memory controller carries out a current data write operation in which a current write data from said host system is written into selected one sector of said plurality of physical sectors identified by a current physical address which is converted by said memory controller from a current host logical address, and said memory controller carries out a succeeding data write operation in which a succeeding write data from said host system is written into selected another sector of said plurality of physical sectors identified by said current physical address which is converted by said memory controller from a current host logical address from a current host logical address that is identical to said preceding host logical address, and wherein said succeeding data write operation is carried out within said storage device in spite of a condition in which said selected one sector of said plurality of physical sectors is not defective but usable before said succeeding data write operation.

16. A storage device according to claim 13, wherein said address conversion in said memory controller is carried out by address calculation using a pointer of said memory controller.

17. A storage device according to claim 14, wherein said address conversion in said memory controller is carried out by address calculation using a pointer of said memory controller.

18. A storage device according to claim 15, wherein said address conversion in said memory controller is carried out by address calculation using a pointer of said memory controller.