Light-sensing device

• US 20050167709A1
• Filed: 03/02/2005
• Published: 08/04/2005
• Est. Priority Date: 09/19/2002
• Status: Active Grant

• Current Assignee: Quantum Semiconductor LLC
• Original Assignee: Quantum Semiconductor LLC
• Inventors: Augusto, Carlos J.R.P.
• Granted Patent: US 7,521,737 B2
• Time in Patent Office: Days
• US Class Current: 257/292
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14625 Optical elements or arrangements associated with the device
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14665 Imagers using a photoconductor layer
• CPC Class Codes: H01L 27/14669 Infrared imagers
• CPC Class Codes: H01L 31/0232 Optical elements or arrangements associated with the device H01L31/0236 takes precedence; for photovoltaic cells H01L31/054; for photovoltaic modules H02S40/20
• CPC Class Codes: H01L 31/107 the potential barrier working in avalanche mode, e.g. avalanche photodiodes
• CPC Class Codes: H01L 31/1075 in which the active layers, e.g. absorption or multiplication layers, form an heterostructure, e.g. SAM structure

Abstract

A method of fabricating light-sensing devices including photodiodes monolithically integrated with CMOS devices. Several types of photodiode devices (PIN, HIP) are epitaxially grown in one single step on active areas implanted in a common semiconductor substrate, the active areas having defined polarities. The epitaxially grown layers for the photodiode devices may be either undoped or in-situ doped with profiles suitable for their respective operation. With appropriate choice of substrate materials, device layers and heterojunction engineering and process architecture, it is possible co fabricate siliconbased and germanium-based multi-spectral sensors that can deliver pixel density and cost of fabrication comparable to the state of the art CCDs and CMOS image sensors. The method can be implemented with epitaxially deposited films on the following substrates: Silicon Bulk, Thick-Film and Thin-Film Silicon-On-Insulator (SOI), Germanium Bulk, Thick-Film and Thin-Film Germanium-On-Insulator (GeOI).

Claims

1. A light-sensing device comprising a semiconductor substrate and photodiodes formed thereon, wherein the semiconductor substrate includes side-by-side active areas implanted therein and CMOS devices, said active areas having a defined polarity and said active areas being electrically isolated from one another and from the adjacent CMOS device by isolation regions (FOX), the photodiodes comprising photodiodes of a first type (PIN) and of a second type (Heterojunction Internal Photoemission—

HIP), the photodiodes of the first and second types being formed in one single epitaxial growth step on said active areas.

2. A light-sensing device as claimed in claim 1, wherein the photodiodes of the first type are grown on active areas having a predetermined first polarity and the photodiodes of the second type being grown on active areas having a second polarity that is opposite to said first polarity.

3. A light-sensing device as claimed in claim 1, wherein the photodiodes of the first and second types are formed in one single epitaxial growth step on active areas having the same polarity, said photodiodes of the first type and of the second type having a common top electrode formed by a Schottky junction,

4. A light-sensing device as claimed in claim 1, wherein the substrate is made of a material selected from the group comprising Silicon Bulk substrates, or Thick-Film Silicon-On-Insulator (SOI), or Thin-Film Silicon-On-Insulator (SOI), or Germanium Bulk substrates, or Thick-Film Germanium (GeOI), or Thin-Film Germanium-On-Insulator (GeOI).

5. A light-sensing device as claimed in claim 1, wherein the active areas are the bottom electrodes of epitaxially grown photodiodes.

6. A light-sensing device as claimed in claim 1, wherein the surface of the active areas is corrugated.

7. A light-sensing device as claimed in claim 1, wherein the epitaxially grown layers of the photodiodes are in contact with the side edges of the active areas underneath.

8. A light-sensing device as claimed in claim 1, wherein the epitaxially grown layers of the photodiodes cover the top edges of the isolation areas placed between active areas.

9. A light-sensing device as claimed in claim 1, wherein the bottom electrode and the epitaxial layers comprising a middle region and a top electrode, form devices operating in avalanche mode, such as Avalanche Photo-Diodes diodes.

10. A light-sensing device as claimed in claim 1, further comprising at least one Heterojunction Integrated Thermionic (HIT) cooler device fabricated with the same single epitaxial growth used for forming the photodiodes of the first (PIN) and second (HIP) types.

11. A light-sensing device as claimed in claim 10, optimized for Front-Side Illumination on a Si or Ge bulk substrate or on a SOI or GeOI substrate.

12. A light-sensing device as claimed in claim 10, optimized for Back-Side Illumination on a Thin-Film SOI or Thin-Film GeOI substrate.

13. A light-sensing device as claimed in claim 10, optimized for Back-Side Illumination using “

Device Layer Transfer”

from a Si or Ge substrate.

14. A method of fabricating a photo-sensing device including photodiode devices monolithically integrated with CMOS devices, comprising the steps of:

forming a semiconductor substrate having side-by-side active areas implanted therein, said active areas having a defined polarity and said active areas being electrically isolated from one another and from the adjacent CMOS device,

forming photodiodes of a first and of a second type in one single epitaxial growth step on selected active areas,

depositing a contact layer on at least one selected area of the epitaxially grown photodiodes,

forming a metal interconnect layer on top of the selected areas of said epitaxially grown photodiodes,

depositing a planarized dielectric layer on the non-selected areas of said epitaxially grown photodiodes up to the top level of said metal interconnect layer.

15. The method as claimed in claim 14, wherein the photodiodes of a first type are grown on active areas having a predetermined first polarity and the photodiodes of the second type are grown on active areas having a second polarity opposite to said first polarity.

16. The method as claimed in claim 14, wherein the photodiodes of the first and second types are formed in one single epitaxial growth step on active areas having the same polarity, the top electrode for said photodiodes of the first type and of the second type being formed by a common Schottky junction.

17. The method as claimed in claim 14, wherein the photodiodes of the first and second types are formed in one single epitaxial growth step on active areas, the bottom electrode for said photodiodes of the first type and of the second type being formed by the active area underneath.

18. The method as claimed in claim 14, wherein the epitaxially grown layers of the photodiodes are in-situ doped with profiles tailored to suit for specific operation.

19. The method as claimed in claim 14, wherein the epitaxially grown layers of the photodiodes are doped with a specific profile suitable for operation in Avalanche mode.