Atm traffic generator with interleave memory

• US 20050169278A1
• Filed: 04/04/2003
• Published: 08/04/2005
• Est. Priority Date: 04/12/2002
• Status: Abandoned Application

• Current Assignee: Xyratex Technology Limited (Seagate Technology Holdings Plc)
• Original Assignee: Xyratex Technology Limited (Seagate Technology Holdings Plc)
• Inventors: Dries, William M., MIllard, Paul C., Rickard, Kathryn E.
• Application Number:
  US10/509,614
• Publication Number:
  US 20050169278A1
• Time in Patent Office: Days
• US Class Current: 370/395.100
• CPC Class Codes: H04L 12/5601 Transfer mode dependent, e.g. ATM
• CPC Class Codes: H04L 2012/5628 Testing
• CPC Class Codes: H04L 43/50 Testing arrangements

Abstract

A traffic generator for generating a packet information stream that includes plural information cells has plural memory regions. Each memory region contains identical data in the form of plural information cells. A memory-reading device reads information cells from the plural memory regions in an alternating manner such that, as an information cell is being read from one of the memory regions, the next memory region from which the next information cell is to be read can be activated. In this way, the next information cell can be read from the next memory region substantially as soon as the previous information cell has been read from the first memory region, thereby to generate a packet information stream from the read information cells.

Claims

1. A method of generating a packet information stream that comprises plural information cells, the method comprising:

storing identical data in the form of plural information cells in each of plural memory regions; and

,

generating a packet information stream by reading information cells from the plural memory regions in an alternating manner such that, as an information cell is being read from one of the memory regions, the next memory region from which the next information cell is to be read can be activated whereby said next information cell can be read from said next memory region substantially as soon as the previous information cell has been read from said one of the memory regions.

2. A method according to claim 1, wherein each information cell has a time period, each memory region has an access time, and the number of memory regions is equal to or greater than the ratio (cell time period/memory region access time) rounded up to the nearest integer.

3. A method according to claim 1, wherein there are exactly two said memory regions, alternate information cells in the packet information stream being obtained by alternately reading information cells from said two memory regions.

4. A method according to claim 1, wherein the plural memory regions are provided in a single memory device.

5. A method according to claim 4, wherein the memory device is a SDRAM.

6. A method according to claim 1, wherein each of the plural memory regions is provided by a respective discrete memory device.

7. A method according to claim 6, wherein the memory devices are SDRAMs.

8. A traffic generator for generating a packet information stream that comprises plural information cells, the traffic generator comprising:

plural memory regions each of which contains in use identical data in the form of plural information cells;

at least one memory-reading device constructed and arranged to read information cells from the plural memory regions in an alternating manner such that, as an information cell is being read from one of the memory regions, the next memory region from which the next information cell is to be read can be activated whereby said next information cell can be read from said next memory region substantially as soon as the previous information cell has been read from said one of the memory regions, thereby to generate a packet information stream from said read information cells.

9. A traffic generator according to claim 8, wherein each information cell has a time period, each memory region has an access time, and the number of memory regions is equal to or greater than the ratio (cell time period/memory region access time) rounded up to the nearest integer.

10. A traffic generator according to claim 8, wherein there are exactly two said memory regions, the at least one memory-reading device being constructed and arranged to alternately read information cells from said two memory regions thereby to generate a packet information stream from said read information cells.

11. A traffic generator according to claim 8, wherein the plural memory regions are provided in a single memory device.

12. A traffic generator according to claim 11, wherein the memory device is a SDRAM.

13. A traffic generator according to claim 8, wherein each of the plural memory regions is provided by a respective discrete memory device.

14. A traffic generator according to claim 13, wherein the memory devices are SDRAMs.

15. A method of generating a packet information stream that comprises plural information cells, the method comprising:

storing identical data in the form of plural information cells in each of plural memory regions; and

,

generating a packet information stream by reading groups of information cells from the plural memory regions in an alternating manner such that, as a group of information cells is being read from one of the memory regions, the next memory regions from which the next group of information cells is to be read can be activated whereby said next group of information cells can be read from said next memory region substantially as soon as the previous group of information cells has been read from said one of the memory regions, at least one of the groups of information cells comprising at least two said information cells.

16. A method according to claim 15, wherein each group of information cells has a time period, each memory region has an access time, and the number of memory devices is equal to or greater than the ratio (group of information cells time period/memory region access time) rounded up to the nearest integer.

17. A method according to claim 15, wherein there are exactly two said memory regions, alternate groups of information cells in the packet information stream being obtained by alternately reading groups of information cells from said two memory regions.

18. A method according to claim 15, wherein the plural memory regions are provided in a single memory device.

19. A method according to claim 18, wherein the memory device is a SDRAM.

20. A method according to claim 15, wherein each of the plural memory regions is provided by a respective discrete memory device.

21. A method according to claim 20, wherein the memory devices are SDRAMs.

22. A traffic generator for generating a packet information stream that comprises plural information cells, the traffic generator comprising:

plural memory regions each of which contains in use identical data in the form of plural information cells;

at least one memory-reading device constructed and arranged to read groups of information cells from the plural memory regions in an alternating manner such that, as a group of information cells is being read from one of the memory regions, the next memory region from which the next group of information cells is to be read can be activated whereby said next group of information cells can be read from said next memory region substantially as soon as the previous group of information cells has been read from said one of the memory regions, thereby to generate a packet information stream from said read group of information cells, at least one of the groups of information cells comprising at least two said information cells.

23. A traffic generator according to claim 22, wherein each group of information cells has a time period, each memory region has an access time, and the number of memory regions is equal to or greater than the ratio (group of information cells time period/memory region access time) rounded up to the nearest integer.

24. A traffic generator according to claim 22, wherein there are exactly two said memory regions, the at least one memory-reading device being constructed and arranged to alternately read groups of information cells from said two memory regions thereby to generate a packet information stream from said read information cells.

25. A traffic generator according to claim 22, wherein the plural memory regions are provided in a single memory device.

26. A traffic generator according to claim 25, wherein the memory device is a SDRAM.

27. A traffic generator according to claim 22, wherein each of the plural memory regions is provided by a respective discrete memory device.

28. A traffic generator according to claim 27, wherein the memory devices are SDRAMs.

29. A method of providing random access to stored data, the method comprising:

storing identical data in the form of plural data blocks in each of plural memory regions; and

,

reading said data by reading data blocks from the plural memory regions in an alternating manner such that, as a data block is being read from one of the memory regions, the next memory region from which the next data block is to be read can be activated whereby said next data block can be read from said next memory region substantially as soon as the previous data block has been read from said one of the memory regions.

30. A method according to claim 29, wherein each data block has a time period, each memory region has an access time, and the number of memory regions is equal to or greater than the ratio (data block period/memory region access time) rounded up to the nearest integer.

31. A method according to claim 29, wherein there are exactly two said memory regions.

32. A method according to claim 29, wherein the plural memory regions are provided in a single memory device.

33. A method according to claim 32, wherein the memory device is a SDRAM.

34. A method according to claim 29, wherein each of the plural memory regions is provided by a respective discrete memory device.

35. A method according to claim 34, wherein the memory devices are SDRAMs.