Graphics processor and system with microcontroller for programmable sequencing of power up or power down operations

• US 20050231454A1
• Filed: 06/20/2005
• Published: 10/20/2005
• Est. Priority Date: 09/03/2002
• Status: Active Grant

• Current Assignee: Dennis K.D. Ma, Jonah M. Alben
• Original Assignee: Dennis K.D. Ma, Jonah M. Alben
• Inventors: Ma, Dennis KD, Alben, Jonah M.
• Granted Patent: US 7,126,608 B2
• Time in Patent Office: Days
• US Class Current: 345/87
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2330/026 Arrangements or methods related to booting a display
• CPC Class Codes: G09G 3/2092 Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165
• CPC Class Codes: G09G 5/363 Graphics controllers

Abstract

A graphics processor or display device including a microcontroller that functions as a sequencer, a computer system including at least one such graphics processor or display device, and a microcontroller for use in such a graphics processor or display device. In preferred embodiments, the microcontroller functions as a sequencer for controlling the timing of power up and/or power down operations by one or both of a graphics processor and a display device. The microcontroller is implemented to exclude any capacity to handle interrupts and so can provide guaranteed timing, and is preferably implemented to be small, simple, and programmable, and to store a small number of programs. Each program consists of instructions belonging to a small instruction set, such as a set consisting of set and clear instructions (for overriding or overwriting specified register bits) and wait, release, and stop instructions. When executing a program, the microcontroller typically overrides (in an ordered sequence) state and control bits that would otherwise be asserted.

Claims

1. A graphics processor, comprising:

a set of registers storing register bits, wherein at least one of the register bits controls power being supplied to a flat panel display; and

a microcontroller coupled to the registers and configured to selectively override the register bits, wherein the microcontroller is configured to function as a sequencer for controlling the timing with which power is supplied to the flat panel display by executing instructions in a manner immune from interrupts.

2. The processor of claim 1, wherein the microcontroller is configured to commence execution of a sequence of the instructions in response to at least one of the register bits, and to execute the sequence of the instructions without receipt of any external data.

3. The processor of claim 1, wherein at least one of the register bits controls supplied power to only the backlight of the flat panel display.

4. The processor of claim 3, wherein execution of the instructions determines a time interval between the supplying of power to the backlight of the flat panel display and the supplying of power to at least one other element of the flat panel display.

5. The processor of claim 4, wherein the microcontroller is configured to determine the time interval by software looping without the use of a hardware timer circuit.

6. The processor of claim 4, wherein the microcontroller includes a timer circuit, and the time interval is determined by the timer circuit.

7. A graphics processor, comprising:

a set of registers storing register bits, wherein at least one of the register bits controls power being supplied to a flat panel display;

a microcontroller coupled to the registers and configured to selectively overwrite the register bits, wherein the microcontroller is configured to function as a sequencer for controlling the timing with which power is supplied to the flat panel display by executing instructions in a manner immune from interrupts.

8. The processor of claim 7, wherein the microcontroller is configured to commence execution of a sequence of the instructions in response to at least one of the register bits, and to execute the sequence of the instructions without receipt of any external data.

9. The processor of claim 7, wherein at least one of the register bits controls supplied power to only the backlight of the flat panel display.

10. The processor of claim 9, wherein execution of the instructions determines a time interval between the supplying of power to the backlight of the flat panel display and the supplying of power to at least one other element of the flat panel display.

11. The processor of claim 10, wherein the microcontroller is configured to determine the time interval by software looping without the use of a hardware timer circuit.

12. The processor of claim 10, wherein the microcontroller includes a timer circuit, and the time interval is determined by the timer circuit.

13. A system, including:

a system bus;

a CPU connected along the system bus;

a graphics processor connected along the system bus;

a frame buffer coupled to receive video data from the graphics processor; and

a display device, coupled and configured to receive frames of the video data from the frame buffer and to produce a display in response thereto,

wherein at least one of the graphics processor and the display device includes;

a set of registers storing register bits, wherein at least one of the register bits controls power being supplied to the flat panel display; and

a microcontroller coupled to the registers and configured to selectively override the register bits, wherein the microcontroller is configured to function as a sequencer for controlling the timing with which power is supplied to the display by executing instructions in a manner immune from interrupts.

14. The system of claim 13, wherein the microcontroller is configured to commence execution of a sequence of the instructions in response to at least one of the register bits, and to execute the sequence of the instructions without receipt of any external data.

15. The system of claim 14, wherein the display device is a flat panel display having a backlight, the graphics processor includes the set of registers and the microcontroller, and at least one of the register bits controls supplied power to only the backlight of the flat panel display.

16. The system of claim 15, wherein execution of the instructions determines a time interval between the supplying of power to the backlight of the flat panel display and the supplying of power to at least one other element of the flat panel display.

17. The system of claim 16, wherein the microcontroller is configured to determine the time interval by software looping without the use of a hardware timer circuit.

18. The system of claim 16, wherein the microcontroller includes a timer circuit, and the time interval is determined by the timer circuit.

19. The system of claim 13, wherein the microcontroller is configured to selectively override the register bits, and the microcontroller includes:

multiplexer circuitry coupled to receive the sequence of control bits and the register bits, and configured to override a sequence of the register bits by passing through one of the control bits in place of each of the register bits in said sequence of the register bits.

20. The system of claim 13, wherein the microcontroller is further configured to selectively overwrite the register bits.