Circuits including parallel conduction paths and methods of operating an electronic device including parallel conduction paths

• US 20060012587A1
• Filed: 07/16/2004
• Published: 01/19/2006
• Est. Priority Date: 07/16/2004
• Status: Active Grant

• Current Assignee: E. I. du Pont de Nemours and Company (Corteva, Inc.)
• Original Assignee: E. I. du Pont de Nemours and Company (Corteva, Inc.)
• Inventors: Yu, Gang, Stevenson, Matthew, Zhang, Weixiao
• Granted Patent: US 7,397,448 B2
• Time in Patent Office: Days
• US Class Current: 345/204
• CPC Class Codes: G09G 2300/0814 used for selection purposes, e.g. logical AND for partial update
• CPC Class Codes: G09G 2300/0833 forming a linear amplifier or follower
• CPC Class Codes: G09G 2300/0852 being a dynamic memory with more than one capacitor
• CPC Class Codes: G09G 2300/0857 Static memory circuit, e.g. flip-flop
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2310/0254 Control of polarity reversal in general, other than for liquid crystal displays
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3291 in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements

Abstract

In one embodiment, a circuit for driving an electronic component includes a first conduction path and a second conduction path connected in parallel. Each of the first and second conduction paths includes a field-effect transistor. The first field-effect transistor lies along the first conduction path, and the second field-effect transistor lies along the second conduction path. The circuit can be used in an electronic device that includes a radiation-emitting electronic component or a radiation-responsive electronic component. During a first time period, current flows through the first conduction path and the first electronic component while a second conduction path of a driving unit is off. During a second time period, current flows through the second conduction path and the first electronic component while the first conduction path of the driving unit is off.

Claims

1. A circuit for driving an electronic component, wherein the circuit comprises:

a first conduction path comprising a first field-effect transistor comprising a gate electrode, a first source/drain region, and a second source/drain region; and

a second conduction path comprising a second field-effect transistor comprising a gate electrode, a first source/drain region, and a second source/drain region,

wherein;

the first source/drain region of the first field-effect transistor and the second source/drain region of the first field-effect transistor lie along the first conduction path;

the first source/drain region of the second field-effect transistor and the second source/drain region of the second field-effect transistor lies along the second conduction path; and

the first and second conduction paths are connected in parallel.

2. The circuit of claim 1, wherein:

each of the first and second field-effect transistors further comprises a gate dielectric layer;

the first source/drain regions of the first and second field-effect transistors are connected to each other;

the second source/drain regions of the first and second field-effect transistors are connected to each other;

the gate electrode of the first field-effect transistor is coupled to a first control line; and

the gate electrode of the second field-effect transistor is coupled to a second control line.

3. The circuit of claim 2, further comprising a first capacitive electronic component and a second capacitive electronic component, wherein:

first electrodes of the first capacitive electronic component and the second capacitive electronic component are coupled to the first source/drain regions of the first field-effect transistor and the second field-effect transistor;

a second electrode of the first capacitive electronic component is connected to the gate electrode of the first field-effect transistor; and

a second electrode of the second capacitive electronic component is connected to the gate electrode of the second field-effect transistor.

4. The circuit of claim 1, further comprising a first data holder unit and a second data holder unit, wherein:

first terminals of the first data holder unit and the second data holder unit are coupled to the first source/drain regions of the first field-effect transistor and the second field-effect transistor;

a second terminal of the first data holder unit is connected to the gate electrode of the first field-effect transistor; and

a second terminal of the second data holder unit is connected to the gate electrode of the second field-effect transistor.

5. The circuit of claim 1, wherein each of the first and second field-effect transistors comprises a channel region, wherein each of the channel regions was formed as amorphous silicon (a-Si), low-temperature polysilicon (LTPS), continuous grain silicon (CGS), or any combination thereof.

6. An electronic device comprising;

the circuit of claim 1;

and

an electronic component, wherein;

the electronic component comprises a first electrode and a second electrode;

the first electrode of the electronic component is connected to the second source/drain regions of the first and second field-effect transistors; and

the second electrode of the electronic component is connected to a power supply line.

7. The electronic device of claim 6, wherein the electronic component comprises an organic active layer.

8. The electronic device of claim 7, wherein the electronic component is a radiation-emitting electronic component.

9. A method of operating an electronic device comprising a first electronic component, wherein the first electronic component is a radiation-emitting electronic component or a radiation-responsive electronic component, and wherein a first terminal of the first electronic component is connected to first terminals of at least two parallel conduction paths within a driving unit, including a first conduction path and a second conduction path, wherein the method comprises:

during a first time period, activating a first conduction path within the driving unit so that current flows through the first conduction path and the first electronic component while a second conduction path of the driving unit is off; and

during a second time period, activating the second conduction path within the driving unit so that current flows through the second conduction path and the first electronic component while the first conduction path of the driving unit is off.

10. The method of claim 9, wherein:

if the first electronic component is a radiation-emitting electronic component, the first electronic component emits radiation during the first and second time periods; and

if the first electronic component is a radiation-responsive electronic component, the first electronic component responds to radiation during the first and second time periods.

11. The method of claim 9, wherein:

the first conduction path comprises a first field-effect transistor comprising a first source/drain region, a second source/drain region, a gate electrode, and a gate dielectric layer;

the first and second source/drain regions of the first field-effect transistor are connected to the first conduction path;

the second conduction path comprises a second field-effect transistor comprising a first source/drain region, a second source/drain region, a gate electrode, and a gate dielectric layer; and

the first and second source/drain regions of the second field-effect transistor are connected to the second conduction path.

12. The method of claim 11, wherein:

the first source/drain regions of the first and second field-effect transistors are connected to each other; and

the second source/drain regions of the first and second field-effect transistors are connected to each other.

13. The method of claim 11, wherein each of the first and second field-effect transistors comprises a channel region, wherein the channel region was formed as amorphous silicon (a-Si), low-temperature polysilicon (LTPS), continuous grain silicon (CGS), or any combination thereof.

14. The method of claim 13, wherein the first electronic component is an organic electronic device.

15. The method of claim 13, wherein the electronic device further comprises:

a first data holder unit comprising a first terminal and a second terminal, wherein the first terminal of the first data holder unit is coupled to the second source/drain region of the first field-effect transistor, and the second terminal of the first data holder unit is connected to the gate electrode of the first field-effect transistor; and

a second data holder unit comprising a first terminal and a second terminal, wherein the first terminal of the second data holder unit is coupled to the second source/drain region of the second field-effect transistor, and the second terminal of the second data holder unit is connected to the gate electrode of the second field-effect transistor.

16. The method of claim 15, wherein:

during the first time period, the first data holder unit holds a first signal corresponding to a first image, and the second data holder unit holds a second signal corresponding to a first threshold voltage recovery signal; and

during the second time period, the first data holder unit holds a third signal corresponding to a second threshold voltage recovery signal, and the second data holder unit holds a fourth signal corresponding to a second image.

17. A method of operating an electronic device comprising an array of first electronic components, wherein:

each of the first electronic components is a radiation-emitting electronic component or a radiation-responsive electronic component;

for each first electronic component, a first terminal of the first electronic component is connected to first terminals of at least two parallel conduction paths within a driving unit, including a first conduction path and a second conduction path;

the first conduction path comprises a first field-effect transistor comprising a first source/drain region, a second source/drain region, and a gate electrode, wherein the first and second source/drain regions of the first field-effect transistor are connected to the first conduction path;

the second conduction path comprises a second field-effect transistor comprising a first source/drain region, a second source/drain region, and a gate electrode, wherein the first and second source/drain regions of the second field-effect transistor are connected to the second conduction path;

wherein the method comprises;

collecting first data regarding first signals sent to the gate electrodes of the first field-effect transistors during a first time period, wherein the first signals correspond to a first image; and

determining second values of second signals that are to be sent to the gate electrodes of the first field-effect transistors during a second time period, wherein the second signals correspond to first threshold voltage recovery signals.

18. The method of claim 17, wherein the first signals have an opposite polarity compared to the second signals, wherein a reference voltage for determining polarity is a reference voltage representative of voltages of the first source/drain regions of the first field-effect transistors or the second source/drain regions of the first field-effect transistors during the first time period.

19. The method of claim 17, further comprising:

accessing a length of the first time period;

determining first voltage-time products, wherein for each first field-effect transistor;

each of the first time-voltage products is the length of the first time period times a first voltage difference for one of the first field-effect transistors; and

the first voltage difference for the each first field-effect transistor is a voltage on the gate electrode of the first field-effect transistor minus a voltage on the first source/drain region of the first field-effect transistor, the second source/drain region of the first field-effect transistor, or both; and

accessing a length of the second time period.

20. The method of claim 19, wherein determining the second values of the second signals comprises:

multiplying the first voltage-time products times −

1 to give second voltage-time products;

dividing the second voltage-time products by the length of the second time period to obtain quotients; and

adding the quotients to a reference voltage to obtain the values of the second signals.

21. The method of claim 17, wherein each of the first and second field-effect transistors comprises a channel region, wherein the channel region was formed as amorphous silicon (a-Si), low-temperature polysilicon (LTPS), continuous grain silicon (CGS), or any combination thereof.

22. The method of claim 21, wherein the electronic device comprises a driving unit comprising the first and second field-effect transistors, wherein the driving unit further comprises:

a first data holder unit comprising a first terminal and a second terminal, wherein;

the first field-effect transistor further comprises a gate dielectric layer;

the first terminal of the first data holder unit is connected to the gate electrode of the first field-effect transistor; and

the second terminal of the first data holder unit is coupled to the second source/drain region of the first field-effect transistor; and

a second data holder unit comprising a first terminal and a second terminal, wherein;

the second field-effect transistor further comprises a gate dielectric layer;

the first terminal of the second data holder unit is connected to the gate electrode of the second field-effect transistor; and

the second terminal of the second data holder unit is coupled to the second source/drain region of the second field-effect transistor.

23. The method of claim 17, wherein each first electronic component comprises an organic electronic device comprising an organic active layer.

24. The method of claim 23, wherein the first electronic components are radiation-emitting electronic components.